天野 英晴

研究成果

年別の研究成果 1983 2003 2005 2007 2008 2009 2010 2011 2012 2013 2015 2016 2017 2018 2019 2020 2021 2022

• 352 Conference contribution
• 112 Article
• 21 Paper
• 14 Editorial
• 26 その他
  • 13 Conference article
  • 10 Chapter
  • 3 Review article

年別の研究成果

年別の研究成果

検索結果

• Paper

  A fully pipelined FPGA architecture for stochastic simulation of chemical systems

  Thomas, D. B. & Amano, H., 2013.

  研究成果: Paper › 査読

  • Field Programmable Gate Array 100%
  • Stochastic Simulation 81%
  • Architecture 70%
  • Field programmable gate arrays (FPGA) 51%
  • Simulator 49%
  4 被引用数 (Scopus)

• A hardware complete detection mechanism for an energy efficient reconfigurable accelerator CMA

  Tsusaka, A., Izawa, M., Uno, R., Ozaki, N. & Amano, H., 2013 1月 1.

  研究成果: Paper › 査読

  • Energy Efficient 100%
  • Accelerator 84%
  • Combinatorial circuits 78%
  • Hardware 74%
  • Parallel processing systems 62%
  1 被引用数 (Scopus)

• A new memory module for COTS-based personal supercomputing

  Tanabe, N., Nakatake, M., Hakozaki, H., Dohi, Y., Nakajo, H. & Amano, H., 2004 12月 1, p. 40-48. 9 p.

  研究成果: Paper › 査読

  • Commercial off-the-shelf 100%
  • Supercomputers 65%
  • Data storage equipment 52%
  • Program processors 49%
  • Personal computers 28%
  11 被引用数 (Scopus)

• An OpenCL runtime library for embedded multi-core accelerator

  Sakamoto, R., Sato, M., Koizumi, Y., Amano, H. & Namiki, M., 2012 11月 19, p. 419-422. 4 p.

  研究成果: Paper › 査読

  • Particle accelerators 100%
  • Data transfer 28%
  • Application programs 12%
  • Synchronization 11%
  • Scheduling 9%
  1 被引用数 (Scopus)

• Demonstration of a heterogeneous multi-core processor with 3-D inductive coupling links

  Koizumi, Y., Miura, N., Take, Y., Matsutani, H., Kuroda, T., Amano, H., Sakamoto, R., Namiki, M., Usami, K., Kondo, M. & Nakamura, H., 2013 1月 1.

  研究成果: Paper › 査読

  • Multi-core Processor 100%
  • 3D 60%
  • Particle accelerators 57%
  • Accelerator 52%
  • Demonstrations 46%

• Distributed shared memory architecture for JUMP-1: A general-purpose MPP prototype

  Matsumoto, T., Kudoh, T., Nishimura, K., Hiraki, K., Amano, H. & Tanaka, H., 1996, p. 131-137. 7 p.

  研究成果: Paper › 査読

  • Memory architecture 100%
  • Data storage equipment 49%
  • Multicasting 20%
  • Computer networks 16%
  • Routers 15%
  5 被引用数 (Scopus)

• Fine-grained power control using a multi-voltage variable pipeline router

  Nakamura, T., Matsutani, H., Koibuchi, M., Usami, K. & Amano, H., 2012 12月 1, p. 59-66. 8 p.

  研究成果: Paper › 査読

  • Routers 100%
  • Power control 95%
  • Pipelines 79%
  • Electric potential 53%
  • Dynamic frequency scaling 17%
  6 被引用数 (Scopus)

• LSI implementation of the simple serial synchronized multistage interconnection network

  Kamei, T., Sasahara, M. & Amano, H., 1997 1月 1, p. 673-674. 2 p.

  研究成果: Paper › 査読

  • Clocks 100%
  • Switches 84%
  • Bandwidth 73%
  • Communication 58%
  1 被引用数 (Scopus)

• Memory based light weight communication architecture for local area distributed computing

  Kudoh, T., Yamamoto, J., Sudoh, F., Amano, H., Ishikawa, Y. & Sato, M., 1997 12月 1, p. 133-139. 7 p.

  研究成果: Paper › 査読

  • Optical interconnects 100%
  • Distributed computer systems 79%
  • Parallel processing systems 77%
  • Personal computers 73%
  • Computer systems 66%
  5 被引用数 (Scopus)

• Message transfer algorithms on the recursive diagonal torus

  Yang, Y. & Amano, H., 1994 12月 1, p. 310-317. 8 p.

  研究成果: Paper › 査読

  • Routing algorithms 100%
  • Broadcasting 50%
  4 被引用数 (Scopus)

• MINC (Multistage Interconnection Network with Cache control mechanism) chip

  Midorikawa, T., Kamei, T., Hanawa, T. & Amano, H., 1998 12月 1, p. 337-338. 2 p.

  研究成果: Paper › 査読

  • Cache memory 100%
  • Data transfer 78%
  • Switches 55%
  2 被引用数 (Scopus)

• Overview of the JUMP-1, an MPP prototype for general-purpose parallel computations

  Hiraki, K., Amano, H., Kuga, M., Sueyoshi, T., Kudoh, T., Nakashima, H., Nakajo, H., Matsuda, H., Matsumoto, T. & Mori, S. I., 1994 12月 1, p. 427-434. 8 p.

  研究成果: Paper › 査読

  • Reduced instruction set computing 100%
  • Synchronization 63%
  • Data storage equipment 48%
  • Communication 40%
  10 被引用数 (Scopus)

• RDT network router chip

  Nishi, H., Amano, H., Nishimura, K., Anjo, K. I. & Kudoh, T., 1997 1月 1, p. 675-676. 2 p.

  研究成果: Paper › 査読

  • Routers 100%
  • Clocks 88%
  • Schematic diagrams 59%
  • Computer hardware description languages 54%
  • Integrated circuits 47%

• Reconfigurable systems: Activities in Asia and South Pacific

  Amano, H. & Shibata, Y., 1998 12月 1, p. 453-457. 5 p.

  研究成果: Paper › 査読

  • Education 100%
  • Computer architecture 70%
  4 被引用数 (Scopus)

• ReCSiP: A ReConfigurable cell simulation platform - Accelerating biological applications with FPGA

  Osana, Y., Fukushima, T. & Amano, H., 2004 6月 1, p. 731-733. 3 p.

  研究成果: Paper › 査読

  • Simulation platform 100%
  • Particle accelerators 90%
  • Field programmable gate arrays (FPGA) 72%
  • Image processing 34%
  5 被引用数 (Scopus)

• Removing context memory from a multi-context dynamically reconfigurable processor

  Amano, H., Kimura, M. & Ozaki, N., 2012 12月 1, p. 92-99. 8 p.

  研究成果: Paper › 査読

  • Array processing 100%
  • Data storage equipment 46%
  • Semiconductor materials 33%
  • Clocks 32%
  • Energy utilization 26%
  6 被引用数 (Scopus)

• Rolling mapping/mesh: a mapping method/interconnection structure for a mesh with various densities

  Murata, A. & Amano, H., 1995 1月 1, p. 445-450. 6 p.

  研究成果: Paper › 査読

  • Electronic data interchange 100%
  • Partial differential equations 93%
  • Scheduling 64%
  • Communication 47%

• Task level pipelining on multiple accelerators via FPGA switch

  Miyajima, T., Kuhara, T., Hanawa, T., Amano, H. & Boku, T., 2014, p. 267-274. 8 p.

  研究成果: Paper › 査読

  • Particle accelerators 100%
  • Field programmable gate arrays (FPGA) 80%
  • Switches 70%
  • Graphics processing unit 30%
  • Communication 16%

• Time-multiplexed execution on the dynamically reconfigurable processor - A performance/cost evaluation

  Hasegawa, Y., Abe, S., Deguchi, K., Suzuki, M. & Amano, H., 2005 6月 20. 1 p.

  研究成果: Paper › 査読

  • Costs 100%
  • Routers 83%
  • Electronic equipment 73%
  • Networks (circuits) 48%

• Towards the realistic `virtual hardware'

  Shibata, Y., Miyazaki, H., Ling, X. P. & Amano, H., 1997 12月 1, p. 50-55. 6 p.

  研究成果: Paper › 査読

  • Logic devices 100%
  • Dynamic random access storage 67%
  • Field programmable gate arrays (FPGA) 63%
  • Computer hardware 45%
  • Data storage equipment 23%

• Wavelength division multiple access ring: Virtual topology on a simple ring network

  Dong, X., Kudoh, T. & Amano, H., 1997 1月 1, p. 30-36. 7 p.

  研究成果: Paper › 査読

  • Wavelength 100%
  • Topology 77%
  • Routers 15%
  1 被引用数 (Scopus)