• 2575 引用
  • 23 h指数
1983 …2020

年単位の研究成果

Pureに変更を加えた場合、すぐここに表示されます。

研究成果

フィルター
Article
1985

Performance analysis of parallel machines using multi‐read memory

Amano, H., Chikawa, J., Yoshida, T. & Also, H., 1985, : : Systems and Computers in Japan. 16, 3, p. 29-37 9 p.

研究成果: Article

1986

Dynamic fault recovery in mesh‐connected parallel computers

Yokota, T., Amano, H. & Aiso, H., 1986, : : Systems and Computers in Japan. 17, 7, p. 10-18 9 p.

研究成果: Article

VLSI SWITCH FOR A DIGITAL PBX.

Purba, S. H., Amano, H., Shobatake, Y. & Aiso, H., 1986 7 1, : : Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. E69, 7, p. 771-774 4 p.

研究成果: Article

1987
1990

(SM)2-II: A Large-Scale Multiprocessor for Sparse Matrix Calculations

Amano, H., Boku, T. & Kudoh, T., 1990 7, : : IEEE Transactions on Computers. 39, 7, p. 889-905 17 p.

研究成果: Article

2 引用 (Scopus)
1991

NCC: A concurrent description language for scientific calculation on multiprocessors

Boku, T., Kudoh, T., Amano, H. & Kimura, T., 1991, : : Systems and Computers in Japan. 22, 12, p. 1-10 10 p.

研究成果: Article

1993

A query‐based parallel logic simulation algorithm

Kudoh, T., Kimura, T., Amano, H. & Terasawa, T., 1993, : : Systems and Computers in Japan. 24, 2, p. 11-21 11 p.

研究成果: Article

1995

A performance evaluation of the multiprocessor testbed ATTEMPT-0

Terasawa, T., Yamamoto, O., Kudoh, T. & Amano, H., 1995 5, : : Parallel Computing. 21, 5, p. 701-730 30 p.

研究成果: Article

2 引用 (Scopus)

Neural network parallel computing for multi-layer channel routing problems

Suzuki, K., Amano, H. & Takefuji, Y., 1995 7, : : Neurocomputing. 8, 2, p. 141-156 16 p.

研究成果: Article

1 引用 (Scopus)

WASMII: An MPLD with data-driven control on a virtual hardware

Ling, X. & Amano, H., 1995 9 1, : : The Journal of Supercomputing. 9, 3, p. 253-276 24 p.

研究成果: Article

11 引用 (Scopus)
1996

Recursive diagonal torus (RDT): An interconnection network for the massively parallel computers

Yang, Y., Amano, H., Shibamura, H. & Sueyoshi, T., 1996 8, : : Systems and Computers in Japan. 27, 9, p. 43-54 12 p.

研究成果: Article

Umessage transfer algorithms an the recursive diagonal torus

Yang, Y. & Amano, H., 1996 1 1, : : IEICE Transactions on Information and Systems. E79-D, 2, p. 107-116 10 p.

研究成果: Article

8 引用 (Scopus)
1997

MINC: Multistage interconnection network with cache control mechanism

Hanawa, T., Kamei, T., Yasukawa, H., Nishimura, K., Amano, H. & Tsudat, N., 1997 1 1, : : IEICE Transactions on Information and Systems. E80-D, 9, p. 863-870 8 p.

研究成果: Article

4 引用 (Scopus)

The RDT Router Chip: A Versatile Router for Supporting a Distributed Shared Memory

Nishü, H., Anjqt, K. I., Kudoh, T. & Amano, H., 1997 1 1, : : IEICE Transactions on Information and Systems. E80-D, 9, p. 854-861 8 p.

研究成果: Article

1 引用 (Scopus)
1998

An analysis of fairness and overhead in the arbitration protocol of the IEEE futurebus standard

Yamamoto, O., Terasawa, T. & Amano, H., 1998 11 30, : : Systems and Computers in Japan. 29, 13, p. 66-77 12 p.

研究成果: Article

A study on snoop cache systems for single-chip multiprocessors

Terasawa, T., Inoue, K., Kurosawa, H. & Amano, H., 1998 2, : : Systems and Computers in Japan. 28, 2, p. 62-72 11 p.

研究成果: Article

Design and implementation of reconfigurable sensing system for networked robots

Miyajima, A., Nukata, K., Amano, H. & Anzai, Y., 1998 1 1, : : Advanced Robotics. 13, 3, p. 253-254 2 p.

研究成果: Article

1 引用 (Scopus)
1999

A routing algorithm for multihop WDM ring

Bong, X., Kudoh, T. & Amano, H., 1999 1 1, : : IEICE Transactions on Information and Systems. E82-D, 2, p. 422-430 9 p.

研究成果: Article

Performance evaluation of SNAIL: A multiprocessor based on the Simple Serial Synchronized Multistage Interconnection Network architecture

Yamamoto, J., Fujiwara, T., Komeda, T., Kamei, T., Hanawa, T. & Amano, H., 1999 9, : : Parallel Computing. 25, 9, p. 1081-1103 23 p.

研究成果: Article

3 引用 (Scopus)
2000

64-Gb/s highly reliable network switch (RHiNET-2/SW) using parallel optical interconnection

Nishimura, S., Kudoh, T., Nishi, H., Yamamoto, J., Harasawa, K., Matsudaira, N., Akutsu, S. & Amano, H., 2000 12 1, : : Journal of Lightwave Technology. 18, 12, p. 1620-1627 8 p.

研究成果: Article

6 引用 (Scopus)
2001
55 引用 (Scopus)
2003

A Dynamically Adaptive Hardware on Dynamically Reconfigurable Processor

Amano, H., Jouraku, A. & Anjo, K., 2003 12, : : IEICE Transactions on Communications. E86-B, 12, p. 3385-3391 7 p.

研究成果: Article

10 引用 (Scopus)

Design and Implementation of RHiNET-2/NI0: A Reconfigurable Network Interface for Cluster Computing

Yokoyama, T., Izu, N., Tsuchiya, J. I., Watanabe, K., Amano, H. & Kudoh, T., 2003 5, : : IEICE Transactions on Information and Systems. E86-D, 5, p. 789-795 7 p.

研究成果: Article

1 引用 (Scopus)
4 引用 (Scopus)

Pot: A General Purpose Monitor for Parallel Computers

Kanamori, Y., Minabe, O., Wakabayashi, M. & Amano, H., 2003 10, : : IEICE Transactions on Information and Systems. E86-D, 10, p. 2025-2033 9 p.

研究成果: Article

2005
3 引用 (Scopus)

Path selection algorithm: The strategy for designing deterministic routing from alternative paths

Koibuchi, M., Jouraku, A. & Amano, H., 2005 1 1, : : Parallel Computing. 31, 1, p. 117-130 14 p.

研究成果: Article

4 引用 (Scopus)
7 引用 (Scopus)

The performance of SNAIL-2 (a SSS-MIN connected multiprocessor with cache coherent mechanism)

Midorikawa, T., Shiraishi, D., Shigeno, M., Tanabe, Y., Hanawa, T. & Amano, H., 2005 3 1, : : Parallel Computing. 31, 3-4, p. 352-370 19 p.

研究成果: Article

1 引用 (Scopus)
2006

A simple data transfer technique using local address for networks-on-chips

Koibuchi, M., Anjo, K., Yamada, Y., Jouraku, A. & Amano, H., 2006 12 1, : : IEEE Transactions on Parallel and Distributed Systems. 17, 12, p. 1425-1437 13 p.

研究成果: Article

16 引用 (Scopus)
2 引用 (Scopus)
2007
26 引用 (Scopus)
1 引用 (Scopus)

Martini: A network interface controller chip for high performance computing with distributed PCs

Watanabe, K., Otsuka, T., Tsuchiya, J., Nishi, H., Yamamoto, J., Tanabe, N., Kudoh, T. & Amano, H., 2007 9 1, : : IEEE Transactions on Parallel and Distributed Systems. 18, 9, p. 1282-1295 14 p.

研究成果: Article

6 引用 (Scopus)

ReCSiP: An FPGA-based general-purpose biochemical simulator

Osana, Y., Yoshimi, M., Iwaoka, Y., Kojima, T., Nishikawa, Y., Funahashi, A., Hiroi, N., Shibata, Y., Iwanaga, N., Kitano, H. & Amano, H., 2007 7 1, : : Electronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi). 90, 7, p. 1-10 10 p.

研究成果: Article

10 引用 (Scopus)
2008
4 引用 (Scopus)
3 引用 (Scopus)