• 2598 引用
  • 23 h指数
1983 …2020

年単位の研究成果

Pureに変更を加えた場合、すぐここに表示されます。

研究成果

フィルター
Article
1 引用 (Scopus)

WASMII: An MPLD with data-driven control on a virtual hardware

Ling, X. & Amano, H., 1995 9 1, : : The Journal of Supercomputing. 9, 3, p. 253-276 24 p.

研究成果: Article

11 引用 (Scopus)

VLSI SWITCH FOR A DIGITAL PBX.

Purba, S. H., Amano, H., Shobatake, Y. & Aiso, H., 1986 7 1, : : Transactions of the Institute of Electronics and Communication Engineers of Japan. Section E. E69, 7, p. 771-774 4 p.

研究成果: Article

Vertical link on/off regulations for inductive-coupling based wireless 3-D NoCs

Zhang, H., Matsutani, H., Take, Y., Kuroda, T. & Amano, H., 2013 12, : : IEICE Transactions on Information and Systems. E96-D, 12, p. 2753-2764 12 p.

研究成果: Article

Umessage transfer algorithms an the recursive diagonal torus

Yang, Y. & Amano, H., 1996 1 1, : : IEICE Transactions on Information and Systems. E79-D, 2, p. 107-116 10 p.

研究成果: Article

8 引用 (Scopus)

The RDT Router Chip: A Versatile Router for Supporting a Distributed Shared Memory

Nishü, H., Anjqt, K. I., Kudoh, T. & Amano, H., 1997 1 1, : : IEICE Transactions on Information and Systems. E80-D, 9, p. 854-861 8 p.

研究成果: Article

1 引用 (Scopus)

The performance of SNAIL-2 (a SSS-MIN connected multiprocessor with cache coherent mechanism)

Midorikawa, T., Shiraishi, D., Shigeno, M., Tanabe, Y., Hanawa, T. & Amano, H., 2005 3 1, : : Parallel Computing. 31, 3-4, p. 352-370 19 p.

研究成果: Article

1 引用 (Scopus)

The first 25 years of the FPL conference: Significant papers

Leong, P. H. W., Amano, H., Anderson, J., Bertels, K., Cardoso, J. M. P., Diessel, O., Gogniat, G., Hutton, M., Lee, J., Luk, W., Lysaght, P., Platzner, M., Prasanna, V. K., Rissa, T., Silvano, C., So, H. K. H. & Wang, Y., 2017 3, : : ACM Transactions on Reconfigurable Technology and Systems. 10, 2, 15.

研究成果: Article

1 引用 (Scopus)

Scalable Networks-on-Chip with Elastic Links Demarcated by Decentralized Routers

Yasudo, R., Matsutani, H., Koibuchi, M., Amano, H. & Nakamura, T., 2017 4 1, : : IEEE Transactions on Computers. 66, 4, p. 702-716 15 p., 7562562.

研究成果: Article

2 引用 (Scopus)

Recursive diagonal torus (RDT): An interconnection network for the massively parallel computers

Yang, Y., Amano, H., Shibamura, H. & Sueyoshi, T., 1996 8, : : Systems and Computers in Japan. 27, 9, p. 43-54 12 p.

研究成果: Article

55 引用 (Scopus)

ReCSiP: An FPGA-based general-purpose biochemical simulator

Osana, Y., Yoshimi, M., Iwaoka, Y., Kojima, T., Nishikawa, Y., Funahashi, A., Hiroi, N., Shibata, Y., Iwanaga, N., Kitano, H. & Amano, H., 2007 7 1, : : Electronics and Communications in Japan, Part II: Electronics (English translation of Denshi Tsushin Gakkai Ronbunshi). 90, 7, p. 1-10 10 p.

研究成果: Article

10 引用 (Scopus)

Reconfigurable out-of-order system for fluid dynamics computation using unstructured mesh

Akamine, T., Abu Talip, M. S., Osana, Y., Fujita, N. & Amano, H., 2014 5, : : IEICE Transactions on Information and Systems. E96-D, 5, p. 1225-1234 10 p.

研究成果: Article

1 引用 (Scopus)

Proxy responses by FPGA-based switch for MapReduce stragglers

Mitsuzuka, K., Koibuchi, M., Amano, H. & Matsutani, H., 2018 9 1, : : IEICE Transactions on Information and Systems. E101D, 9, p. 2258-2268 11 p.

研究成果: Article

2 引用 (Scopus)

Prediction router: A low-latency on-chip router architecture with multiple predictors

Matsutani, H., Koibuchi, M., Amano, H. & Yoshinaga, T., 2011 5 5, : : IEEE Transactions on Computers. 60, 6, p. 783-799 17 p., 5703069.

研究成果: Article

18 引用 (Scopus)
10 引用 (Scopus)

Pot: A General Purpose Monitor for Parallel Computers

Kanamori, Y., Minabe, O., Wakabayashi, M. & Amano, H., 2003 10, : : IEICE Transactions on Information and Systems. E86-D, 10, p. 2025-2033 9 p.

研究成果: Article

Performance evaluation of SNAIL: A multiprocessor based on the Simple Serial Synchronized Multistage Interconnection Network architecture

Yamamoto, J., Fujiwara, T., Komeda, T., Kamei, T., Hanawa, T. & Amano, H., 1999 9, : : Parallel Computing. 25, 9, p. 1081-1103 23 p.

研究成果: Article

3 引用 (Scopus)
7 引用 (Scopus)

Performance analysis of parallel machines using multi‐read memory

Amano, H., Chikawa, J., Yoshida, T. & Also, H., 1985, : : Systems and Computers in Japan. 16, 3, p. 29-37 9 p.

研究成果: Article

29 引用 (Scopus)

Path selection algorithm: The strategy for designing deterministic routing from alternative paths

Koibuchi, M., Jouraku, A. & Amano, H., 2005 1 1, : : Parallel Computing. 31, 1, p. 117-130 14 p.

研究成果: Article

4 引用 (Scopus)

Partial reconfiguration of flux limiter functions in MUSCL scheme using FPGA

Abu Talip, M. S., Akamine, T., Osana, Y., Fujita, N. & Amano, H., 2012 10, : : IEICE Transactions on Information and Systems. E95-D, 10, p. 2369-2376 8 p.

研究成果: Article

Optimization of body biasing for variable pipelined coarse-grained reconfigurable architectures

Kojima, T., Ando, N., Okuhara, H., Doan, N. A. V. & Amano, H., 2018 6 1, : : IEICE Transactions on Information and Systems. E101D, 6, p. 1532-1540 9 p.

研究成果: Article

1 引用 (Scopus)
2 引用 (Scopus)

Neural network parallel computing for multi-layer channel routing problems

Suzuki, K., Amano, H. & Takefuji, Y., 1995 7, : : Neurocomputing. 8, 2, p. 141-156 16 p.

研究成果: Article

1 引用 (Scopus)

NCC: A concurrent description language for scientific calculation on multiprocessors

Boku, T., Kudoh, T., Amano, H. & Kimura, T., 1991, : : Systems and Computers in Japan. 22, 12, p. 1-10 10 p.

研究成果: Article

2 引用 (Scopus)
3 引用 (Scopus)

MINC: Multistage interconnection network with cache control mechanism

Hanawa, T., Kamei, T., Yasukawa, H., Nishimura, K., Amano, H. & Tsudat, N., 1997 1 1, : : IEICE Transactions on Information and Systems. E80-D, 9, p. 863-870 8 p.

研究成果: Article

4 引用 (Scopus)

Martini: A network interface controller chip for high performance computing with distributed PCs

Watanabe, K., Otsuka, T., Tsuchiya, J., Nishi, H., Yamamoto, J., Tanabe, N., Kudoh, T. & Amano, H., 2007 9 1, : : IEEE Transactions on Parallel and Distributed Systems. 18, 9, p. 1282-1295 14 p.

研究成果: Article

6 引用 (Scopus)

High-speed fully-adaptable CRC accelerators

Akagic, A. & Amano, H., 2013 6, : : IEICE Transactions on Information and Systems. E96-D, 6, p. 1299-1308 10 p.

研究成果: Article

2 引用 (Scopus)

Fine-grained run-tume power gating through co-optimization of circuit, architecture, and system software design

Nakamura, H., Wang, W., Ohta, Y., Usami, K., Amano, H., Kondo, M. & Namiki, M., 2013 4, : : IEICE Transactions on Electronics. E96-C, 4, p. 404-412 9 p.

研究成果: Article

Fat H-Tree: A cost-efficient tree-based on-chip network

Matsutani, H., Koibuchi, M., Yamada, Y., Hsu, D. F. & Amano, H., 2009 6 4, : : IEEE Transactions on Parallel and Distributed Systems. 20, 8, p. 1126-1141 16 p.

研究成果: Article

18 引用 (Scopus)

Efficient 3-D Bus Architectures for Inductive-Coupling ThruChip Interfaces

Kagami, T., Matsutani, H., Koibuchi, M., Take, Y., Kuroda, T. & Amano, H., 2016 2, : : IEEE Transactions on Very Large Scale Integration (VLSI) Systems. 24, 2, p. 493-506 14 p., 7086053.

研究成果: Article

15 引用 (Scopus)
2 引用 (Scopus)

Dynamic fault recovery in mesh‐connected parallel computers

Yokota, T., Amano, H. & Aiso, H., 1986, : : Systems and Computers in Japan. 17, 7, p. 10-18 9 p.

研究成果: Article

4 引用 (Scopus)
1 引用 (Scopus)

Design and Implementation of RHiNET-2/NI0: A Reconfigurable Network Interface for Cluster Computing

Yokoyama, T., Izu, N., Tsuchiya, J. I., Watanabe, K., Amano, H. & Kudoh, T., 2003 5, : : IEICE Transactions on Information and Systems. E86-D, 5, p. 789-795 7 p.

研究成果: Article

1 引用 (Scopus)

Design and implementation of reconfigurable sensing system for networked robots

Miyajima, A., Nukata, K., Amano, H. & Anzai, Y., 1998 1 1, : : Advanced Robotics. 13, 3, p. 253-254 2 p.

研究成果: Article