• 1662 引用
  • 17 h指数
1984 …2019
Pureに変更を加えた場合、すぐここに表示されます。

研究成果 1984 2019

フィルター
Chapter
1999
6 引用 (Scopus)

100-Gb/s throughput ATM switch MCM with a 320-channel parallel optical I/O interface

Kawano, R., Yamanaka, N., Oki, E., Yasukawa, S., Okazaki, K., Ohki, A., Usui, M., Sato, N., Katsura, K., Ando, Y., Kagawa, T. & Hikita, M., 1999, Proceedings - Electronic Components and Technology Conference. IEEE, p. 753-758 6 p.

研究成果: Chapter

Multichip modules
Automatic teller machines
Interfaces (computer)
Switches
Throughput
2 引用 (Scopus)

Distributed traffic control method for Tbit/s multi-stage ATM switching systems

Nakai, K., Oki, E. & Yamanaka, N., 1999, IEEE ATM Workshop, Proceedings. IEEE, p. 109-114 6 p.

研究成果: Chapter

Switching systems
Traffic control
Automatic teller machines
Switches
Networks (circuits)
4 引用 (Scopus)

i-QOCF (iterative quasi-oldest-cell-first) algorithm for input-queued ATM switches

Nabeshima, M. & Yamanaka, N., 1999, IEEE ATM Workshop, Proceedings. IEEE, p. 25-30 6 p.

研究成果: Chapter

Automatic teller machines
Time delay
Switches
Scheduling algorithms
Throughput
1 引用 (Scopus)

Nonblocking multi-stage ATM switch using cell-based routing with a hierarchical cell sorting mechanism

Santoso, D., Yasukawa, S., Yamanaka, N. & Miki, T., 1999, IEEE ATM Workshop, Proceedings. IEEE, p. 265-270 6 p.

研究成果: Chapter

Automatic teller machines
Sorting
Cells
Switches
Switching systems
5 引用 (Scopus)

OPTIMA: 640 Gb/s high-speed ATM switching system based on 0.25 μmCMOS, MCM-C, and optical WDM interconnection

Yamanaka, N., Kawano, R., Oki, E., Yasukawa, S. & Okazaki, K., 1999, Proceedings - Electronic Components and Technology Conference. IEEE, p. 26-33 8 p.

研究成果: Chapter

Switching systems
Automatic teller machines
Multicarrier modulation
Wavelength division multiplexing
Voice/data communication systems

Scalable-distributed-arbitration ATM switch supporting multiple QoS classes

Oki, E., Yamanaka, N. & Nabeshima, M., 1999, IEEE ATM Workshop, Proceedings. IEEE, p. 319-324 6 p.

研究成果: Chapter

Automatic teller machines
Quality of service
Switches
Time delay
Throughput
1998

Development of plastic chip scale package for ATM switching systems

Harada, A., Kaizu, K., Yamanaka, N. & Kawamura, T., 1998, Proceedings of the Electronic Packaging Technology Conference, EPTC. IEEE, p. 30-35 6 p.

研究成果: Chapter

Chip scale packages
Switching systems
Automatic teller machines
Heat resistance
Printed circuit boards

DTM: new dynamic transfer mode using dynamically assigned short-hold time-slot relay

Yamanaka, N. & Shiomoto, K., 1998, Conference Record / IEEE Global Telecommunications Conference. IEEE, 巻 1. p. 375-380 6 p.

研究成果: Chapter

HIgh speed networks
digital terrain model
Switches
Time division multiplexing
Switching systems
1 引用 (Scopus)

Feedback rate control with congestion prediction by edge nodes in ATM-WAN

Hasegawa, H., Yamanaka, N. & Shiomoto, K., 1998, Conference Record / IEEE Global Telecommunications Conference. IEEE, 巻 3. p. 1541-1546 6 p.

研究成果: Chapter

airborne thematic mapper
Wide area networks
Automatic teller machines
congestion
Feedback
2 引用 (Scopus)

High-speed connection admission control in ATM networks by generating virtual requests for connection

Oki, E. & Yamanaka, N., 1998, IEEE ATM Workshop, Proceedings. p. 295-299 5 p.

研究成果: Chapter

Asynchronous transfer mode
Access control
Bandwidth

New scheduling mechanisms which efficiently utilize policing for GFR service

Nabeshima, M., Yamanaka, N. & Hasegawa, H., 1998, IEEE ATM Workshop, Proceedings. p. 80-85 6 p.

研究成果: Chapter

Scheduling
Frequency allocation
Automatic teller machines
Switches