抄録
Presented is a two-dimensional 8×8 discrete cosine transform (DCT) core processor for portable multimedia equipment with HDTV resolution in a 0.3μm CMOS triple-well double-metal technology which operates at 150MHz from a 0.9V power supply and consumes 10mW, only 2% power dissipation of a previous 3.3V DCT. Circuit techniques for dynamically varying threshold voltage reduce active power dissipation with negligible overhead in speed standby power and chip area.
本文言語 | English |
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ページ(範囲) | 166-167 |
ページ数 | 2 |
ジャーナル | Digest of Technical Papers - IEEE International Solid-State Circuits Conference |
巻 | 39 |
出版ステータス | Published - 1996 2月 1 |
外部発表 | はい |
イベント | Proceedings of the 1996 IEEE International Solid-State Circuits Conference - San Francisco, CA, USA 継続期間: 1996 2月 8 → 1996 2月 10 |
ASJC Scopus subject areas
- 電子材料、光学材料、および磁性材料
- 電子工学および電気工学