0.9V 150MHz 10mW 4mm2 2-D discrete cosine transform core processor with variable-threshold-voltage scheme

Tadahiro Kuroda, Tetsuya Fujita, Shinji Mita, Tetsu Nagamatu, Shinichi Yoshioka, Fumihiko Sano, Masayuki Norishima, Masayuki Murota, Makoto Kako, Masaaki Kinugawa, Masakazu Kakumu, Takayasu Sakurai

研究成果: Conference article査読

110 被引用数 (Scopus)

抄録

Presented is a two-dimensional 8×8 discrete cosine transform (DCT) core processor for portable multimedia equipment with HDTV resolution in a 0.3μm CMOS triple-well double-metal technology which operates at 150MHz from a 0.9V power supply and consumes 10mW, only 2% power dissipation of a previous 3.3V DCT. Circuit techniques for dynamically varying threshold voltage reduce active power dissipation with negligible overhead in speed standby power and chip area.

本文言語English
ページ(範囲)166-167
ページ数2
ジャーナルDigest of Technical Papers - IEEE International Solid-State Circuits Conference
39
出版ステータスPublished - 1996 2 1
外部発表はい
イベントProceedings of the 1996 IEEE International Solid-State Circuits Conference - San Francisco, CA, USA
継続期間: 1996 2 81996 2 10

ASJC Scopus subject areas

  • 電子材料、光学材料、および磁性材料
  • 電子工学および電気工学

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