3D System integration of processor and multi-stacked SRAMs by using inductive-coupling links

Kenichi Osada, Makoto Saen, Yasuyuki Okuma, Kiichi Niitsu, Yasuhisa Shimazaki, Yasufumi Sugimori, Yoshinori Kohama, Kazutaka Kasuga, Itaru Nonomura, Naohiko Irie, Toshihiro Hattori, Atsushi Hasegawa, Tadahiro Kuroda

    研究成果: Conference contribution

    15 被引用数 (Scopus)

    抄録

    This paper describes a three-dimensional (3D) system integration of a fully functional processor chip and two memory chips by using inductive coupling. To attain a shorter link distance for a smaller area and lower power consumption, a new 3D-integrated wire-penetrated multi-layer structure is developed. In addition, to prevent signal degradation due to unused inductors, an "open-skipped-inductor scheme" is proposed. We present the first demonstration that three fabricated chips are successfully AC-coupled by the inductive coupling. The power and area efficiency of the link are 1 pJ/b and 0.15 mm2/Gbps, respectively, which are the same as those of two-chip integration.

    本文言語English
    ホスト出版物のタイトル2009 Symposium on VLSI Circuits
    ページ256-257
    ページ数2
    出版ステータスPublished - 2009 11 18
    イベント2009 Symposium on VLSI Circuits - Kyoto, Japan
    継続期間: 2009 6 162009 6 18

    出版物シリーズ

    名前IEEE Symposium on VLSI Circuits, Digest of Technical Papers

    Other

    Other2009 Symposium on VLSI Circuits
    国/地域Japan
    CityKyoto
    Period09/6/1609/6/18

    ASJC Scopus subject areas

    • 電子材料、光学材料、および磁性材料
    • 電子工学および電気工学

    フィンガープリント

    「3D System integration of processor and multi-stacked SRAMs by using inductive-coupling links」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

    引用スタイル