5Gb/s 8 × 8 ATM switch element CMOS LSI supporting five quality-of-service classes with 200MHz LVDS interface

Yasuo Unekawa, Keiko Seki-Fukuda, Kenji Sakaue, Takehiko Nakao, Shin'ichi Yoshioka, Tetsu Nagamatsu, Hideaki Nakakita, Yasuyuki Kaneko, Masahiko Motoyama, Yoshihiro Ohba, Koutarou Ise, Masayoshi Ono, Kuniyuki Fujiwara, Yuichi Miyazawa, Tadahiro Kuroda, al et al

研究成果: Conference article査読

19 被引用数 (Scopus)

抄録

The switch element (SE) is a 622Mb/s, 8×8 shared-buffer ATM switch LSI for backbone LAN and WAN applications. The SE has 5Gbps bandwidth, supporting 5 QoS classes delay priority and link-by-link multicast. Up to a 32×32 switch with 20Gbps bandwidth can be configured using multiple SEs and distributor/arbiter LSIs.

本文言語English
ページ(範囲)118-119
ページ数2
ジャーナルDigest of Technical Papers - IEEE International Solid-State Circuits Conference
39
出版ステータスPublished - 1996 2 1
外部発表はい
イベントProceedings of the 1996 IEEE International Solid-State Circuits Conference - San Francisco, CA, USA
継続期間: 1996 2 81996 2 10

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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