7MOPS/lemon-battery image processing demonstration with an ultra-low power reconfigurable accelerator CMA-SOTB-2

Koichiro Masuyama, Yu Fujita, Hayate Okuhara, Hideharu Amano

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

Cool Mega Array (CMA)-SOTB-2 is an ultra-low energy Coarse Grained Reconfigurable Architecture[1] (CGRA) for recent advanced sensor networks, Internet of Things and wearable computing. It has a large Processing Element (PE) array without memory elements for mapping an application's data-flow graph, a small simple programmable μ-controller for data management, and data memory. Unlike traditional coarse grained reconfigurable processors, the power consumption for hardware context switching, storing intermediate data in registers, and clock distribution for them are eliminated from PE array which occupies large area of a chip. It is implemented by using Silicon on Thin BOX (SOTB) CMOS, a new process technology developed by the Low-power Electronics Association & Project (LEAP).

本文言語English
ホスト出版物のタイトル25th International Conference on Field Programmable Logic and Applications, FPL 2015
出版社Institute of Electrical and Electronics Engineers Inc.
ISBN(印刷版)9780993428005
DOI
出版ステータスPublished - 2015 10月 7
イベント25th International Conference on Field Programmable Logic and Applications, FPL 2015 - London, United Kingdom
継続期間: 2015 9月 22015 9月 4

Other

Other25th International Conference on Field Programmable Logic and Applications, FPL 2015
国/地域United Kingdom
CityLondon
Period15/9/215/9/4

ASJC Scopus subject areas

  • ハードウェアとアーキテクチャ
  • 信号処理
  • ソフトウェア
  • コンピュータ サイエンスの応用

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