A 0.5 v 1.1 MS/sec 6.3 fJ/conversion-step SAR-ADC with tri-level comparator in 40 nm CMOS
Akira Shikata, Ryota Sekimoto, Tadahiro Kuroda, Hiroki Ishikuro
研究成果: Article › 査読
98
被引用数
(Scopus)