@article{1df323d82b6d46f7aa172edbc9b1197c,
title = "A 0.55 V 10 fJ/bit inductive-coupling data link and 0.7 V 135 fJ/cycle clock link with dual-coil transmission scheme",
abstract = "This paper presents a 10 fJ/bit inductive-coupling data link operating at 0.55 V supply voltage and a 135 fJ/cycle clock link at 0.7 V supply voltage. A dual-coil transmission scheme reduces the number of stacked transistors in a transmitter, enabling low-voltage and hence low-power operation. A test chip is fabricated in 65 nm CMOS whose nominal supply voltage is 1.2 V. A data rate of 1.1 Gb/s and a clock rate of 3.3 GHz, both with an error rate < 10 -12, are achieved at 0.55 V and 0.7 V supply voltage, respectively.",
keywords = "Inductive coupling, chip stacking, low power, three dimensional",
author = "Noriyuki Miura and Tsunaaki Shidei and Yuxiang Yuan and Shusuke Kawai and Keita Takatsu and Yuji Kiyota and Yuichi Asano and Tadahiro Kuroda",
note = "Funding Information: Manuscript received August 24, 2010; revised November 28, 2010; accepted December 15, 2010. Date of publication February 28, 2011; date of current version March 25, 2011. This paper was approved by Guest Editor Ajith Am-erasekera. This work was supported by CREST/JST. The authors are with Keio University, Yokohama, Kanagawa 223-8522, Japan (e-mail: miura@kuro.elec.keio.ac.jp). Color versions of one or more of the figures in this paper are available online at http://ieeexplore.ieee.org. Digital Object Identifier 10.1109/JSSC.2011.2108127",
year = "2011",
month = apr,
doi = "10.1109/JSSC.2011.2108127",
language = "English",
volume = "46",
pages = "965--973",
journal = "IEEE Journal of Solid-State Circuits",
issn = "0018-9200",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
number = "4",
}