A wireless bus for stacked chips is designed with the interface using inductive coupling with metal spiral inductors. Transceiver circuits for non-return-to-zero signaling are developed. Test chips stacked at a distance of 300μm communicate at data rates of up to 1.2Gb/s/pin. Fabricated in 0.35μm CMOS technology, TX and RX dissipation are 43 and 2.5mW, respectively.
|ジャーナル||Digest of Technical Papers - IEEE International Solid-State Circuits Conference|
|出版物ステータス||Published - 2004 6 2|
|イベント||Digest of Technical Papers - 2004 IEEE International Solid-State Circuits Conference - San Francisco, CA., United States|
継続期間: 2003 2 15 → 2003 2 19
ASJC Scopus subject areas
- Electronic, Optical and Magnetic Materials
- Electrical and Electronic Engineering