A 20-GHz injection-locked LC divider with a 25-% locking range

Takayuki Shibasaki, Hirotaka Tamura, Kouichi Kanda, Hisakatsu Yamaguchi, Junji Ogawa, Tadahiro Kuroda

研究成果: Conference contribution

12 引用 (Scopus)

抜粋

A 20-GHz injection-locked LC divider is described. A Miller divider topology was employed along with a coupling circuit to maximize the locking range. A test chip designed in a 90-nm CMOS technology operates at 20 GHz with 25-% locking range while consuming 6.4 m W of power.

元の言語English
ホスト出版物のタイトル2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers
ページ170-171
ページ数2
出版物ステータスPublished - 2006 12 1
イベント2006 Symposium on VLSI Circuits, VLSIC - Honolulu, HI, United States
継続期間: 2006 6 152006 6 17

出版物シリーズ

名前IEEE Symposium on VLSI Circuits, Digest of Technical Papers

Other

Other2006 Symposium on VLSI Circuits, VLSIC
United States
Honolulu, HI
期間06/6/1506/6/17

    フィンガープリント

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

これを引用

Shibasaki, T., Tamura, H., Kanda, K., Yamaguchi, H., Ogawa, J., & Kuroda, T. (2006). A 20-GHz injection-locked LC divider with a 25-% locking range. : 2006 Symposium on VLSI Circuits, VLSIC - Digest of Technical Papers (pp. 170-171). [1705364] (IEEE Symposium on VLSI Circuits, Digest of Technical Papers).