A 24 mW 5.7 Gbps dual frequency conversion demodulator for impulse radio with the first sidelobe

Kaoru Kohira, Naoki Kitazawa, Hiroki Ishikuro

    研究成果: Article査読

    抄録

    This paper presents a modulation scheme for impulse radio that uses the first sidelobe for transmitting a non-return-to-zero baseband signal and the implementation of a dual frequency conversion demodulator. The proposed modulation technique realizes two times higher frequency efficiency than that realized by binary phase-shift keying modulation and does not require an up-converter in the transmitter. The dual frequency conversion demodulator compensates for the spectrum distortion caused by the frequency response of the circuits and channel. The effect of frequency compensation is analytically studied. The fabricated demodulator test chip of 65 nm CMOS achieves clock and data recovery at 5.7 Gbps with a power consumption of 24 mW.

    本文言語English
    ページ(範囲)1164-1173
    ページ数10
    ジャーナルIEICE Transactions on Electronics
    E99C
    10
    DOI
    出版ステータスPublished - 2016 10 1

    ASJC Scopus subject areas

    • 電子材料、光学材料、および磁性材料
    • 電子工学および電気工学

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