A 60MHz 240mW MPEG-4 video-phone LSI with 16Mb embedded DRAM

T. Nishikawa, M. Takahashi, M. Hamada, T. Takayanagi, H. Arakida, N. Machida, H. Yamamoto, T. Fujiyoshi, Y. Matsumoto, O. Yamagishi, T. Samata, A. Asano, T. Terazawa, K. Ohmori, J. Shirakura, Y. Watanabe, H. Nakamura, S. Minami, T. Kuroda, T. Furuyama

研究成果: Conference article

53 引用 (Scopus)

抜粋

The fabrication of a 240 m W single-chip MPEG-4 video-phone LSI with a 16 Mb embedded dynamic random access storage (DRAM) was discussed. The device integrated camera, display and audio interfaces and employed threshold voltage complementary metal oxide semiconductor CMOS (VTCMOS) technology to reduce standby leakage currents. The embedded DRAM reduced the power dissipation for input/output circuit and for the interface between external DRAM and the processors. The results indicated that the power-on-shunt circuit did not dissipate power after power-up.

元の言語English
ページ(範囲)230-231
ページ数2
ジャーナルDigest of Technical Papers - IEEE International Solid-State Circuits Conference
出版物ステータスPublished - 2000 12 1
外部発表Yes
イベント2000 IEEE International Solid-State Circuits Conference 47th Annual ISSCC - San Francisco, CA, United States
継続期間: 2000 2 72000 2 9

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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    Nishikawa, T., Takahashi, M., Hamada, M., Takayanagi, T., Arakida, H., Machida, N., Yamamoto, H., Fujiyoshi, T., Matsumoto, Y., Yamagishi, O., Samata, T., Asano, A., Terazawa, T., Ohmori, K., Shirakura, J., Watanabe, Y., Nakamura, H., Minami, S., Kuroda, T., & Furuyama, T. (2000). A 60MHz 240mW MPEG-4 video-phone LSI with 16Mb embedded DRAM. Digest of Technical Papers - IEEE International Solid-State Circuits Conference, 230-231.