A 6Gb/s receiver with discrete-time based channel filtering for wireline FDM communications

Tsutomu Takeya; Kazuhisa Sunaga; Koichi Yamaguchi; Hideyuki Sugita; Yoichi Yoshida; Masayuki Mizuno; Tadahiro Kuroda

doi:10.1109/CICC.2010.5617600

A 6Gb/s receiver with discrete-time based channel filtering for wireline FDM communications

Tsutomu Takeya, Kazuhisa Sunaga, Koichi Yamaguchi, Hideyuki Sugita, Yoichi Yoshida, Masayuki Mizuno, Tadahiro Kuroda

研究成果: Conference contribution

抄録

We present a 6Gb/s wireline receiver having Frequency Division Multiplexing (FDM) with four frequency sub-channels. Its 6GS/s discrete-time filter consumes less power than a conventional filter which requires the same number of high-speed analog mixers as sub-channels and provides channel filtering of FDM signals that contain four 1.5GSymbol/s data. Improved I/Q-based phase detection using only in-phase amplitude makes possible low-power symbol-rate clock recovery. The FDM receiver fabricated in 90nm CMOS process achieves BER<10^-12 over a 25cm low-ε channel, while consuming 250mW from a 1.4V supply.

本文言語	English
ホスト出版物のタイトル	IEEE Custom Integrated Circuits Conference 2010, CICC 2010
DOI	https://doi.org/10.1109/CICC.2010.5617600
出版ステータス	Published - 2010 12月 13
イベント	32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010 - San Jose, CA, United States 継続期間: 2010 9月 19 → 2010 9月 22

出版物シリーズ

名前	Proceedings of the Custom Integrated Circuits Conference
ISSN（印刷版）	0886-5930

Other

Other	32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010
国/地域	United States
City	San Jose, CA
Period	10/9/19 → 10/9/22

ASJC Scopus subject areas

電子工学および電気工学

文献へのアクセス

10.1109/CICC.2010.5617600

他のファイルとリンク

引用スタイル

Takeya, T, Sunaga, K, Yamaguchi, K, Sugita, H, Yoshida, Y, Mizuno, M & Kuroda, T 2010, A 6Gb/s receiver with discrete-time based channel filtering for wireline FDM communications. in IEEE Custom Integrated Circuits Conference 2010, CICC 2010., 5617600, Proceedings of the Custom Integrated Circuits Conference, 32nd Annual Custom Integrated Circuits Conference - The Showcase for Circuit Design in the Heart of Silicon Valley, CICC 2010, San Jose, CA, United States, 10/9/19. https://doi.org/10.1109/CICC.2010.5617600

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abstract = "We present a 6Gb/s wireline receiver having Frequency Division Multiplexing (FDM) with four frequency sub-channels. Its 6GS/s discrete-time filter consumes less power than a conventional filter which requires the same number of high-speed analog mixers as sub-channels and provides channel filtering of FDM signals that contain four 1.5GSymbol/s data. Improved I/Q-based phase detection using only in-phase amplitude makes possible low-power symbol-rate clock recovery. The FDM receiver fabricated in 90nm CMOS process achieves BER<10-12 over a 25cm low-ε channel, while consuming 250mW from a 1.4V supply.",

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AU - Takeya, Tsutomu

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AU - Yamaguchi, Koichi

AU - Sugita, Hideyuki

AU - Yoshida, Yoichi

AU - Mizuno, Masayuki

AU - Kuroda, Tadahiro

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AB - We present a 6Gb/s wireline receiver having Frequency Division Multiplexing (FDM) with four frequency sub-channels. Its 6GS/s discrete-time filter consumes less power than a conventional filter which requires the same number of high-speed analog mixers as sub-channels and provides channel filtering of FDM signals that contain four 1.5GSymbol/s data. Improved I/Q-based phase detection using only in-phase amplitude makes possible low-power symbol-rate clock recovery. The FDM receiver fabricated in 90nm CMOS process achieves BER<10-12 over a 25cm low-ε channel, while consuming 250mW from a 1.4V supply.

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A 6Gb/s receiver with discrete-time based channel filtering for wireline FDM communications

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出版物シリーズ

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ASJC Scopus subject areas

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