A 7Gb/s/link non-contact memory module for multi-drop bus system using energy-equipartitioned coupled transmission line

Won Joo Yun, Shinya Nakano, Wataru Mizuhara, Atsutake Kosuge, Noriyuki Miura, Hiroki Ishikuro, Tadahiro Kuroda

    研究成果: Conference contribution

    19 被引用数 (Scopus)

    抄録

    As computing power and speed increases, the demand for higher memory bandwidth increases as well. Recently, the memory interface has been improved up to 20Gb/s/link [1]. Considering PCB routing area, a multi-drop bus architecture is still preferable for large memory capacity to the point-to-point connection. However, the multi-drop approach suffers from performance degradations due to reflections at each stub. To mitigate this problem, reference [2] proposes an impedance-matched bidirectional multi-drop DQ bus architecture that is difficult to realize due to smaller series resistor if more than 4 modules are used. To avoid multi-reflections from each stub, other approaches have used coupled transmission lines (CTL) [3, 4]. While a horizontal directional coupler buried in the PCB was used [3], coupled traces on the bent loop of flex fixed to a module were used for signal delivery in vertical direction [4]. In [3], a long coupler with long main bus line was used so that the signal integrity degrades at the far-end coupler. In [4], the coupling traces on the motherboard and the flex have zigzag geometries for better misalignment tolerance, which result in large area of routing due to the minimum required pitch between traces. In [5], the CTL needs to be placed close to a Tx/Rx chip, as there are no extended transmission lines for signal lead. Therefore, it cannot be used for memory modules. DRAM multi-drop bus interface technology mapping is described in Fig. 2.8.1.

    本文言語English
    ホスト出版物のタイトル2012 IEEE International Solid-State Circuits Conference, ISSCC 2012 - Digest of Technical Papers
    ページ52-53
    ページ数2
    DOI
    出版ステータスPublished - 2012 5 11
    イベント59th International Solid-State Circuits Conference, ISSCC 2012 - San Francisco, CA, United States
    継続期間: 2012 2 192012 2 23

    出版物シリーズ

    名前Digest of Technical Papers - IEEE International Solid-State Circuits Conference
    55
    ISSN(印刷版)0193-6530

    Other

    Other59th International Solid-State Circuits Conference, ISSCC 2012
    国/地域United States
    CitySan Francisco, CA
    Period12/2/1912/2/23

    ASJC Scopus subject areas

    • 電子材料、光学材料、および磁性材料
    • 電子工学および電気工学

    フィンガープリント

    「A 7Gb/s/link non-contact memory module for multi-drop bus system using energy-equipartitioned coupled transmission line」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

    引用スタイル