A 90nm CMOS highly linear clock bootstrapped RF sampler operating at wide frequency range of 0.5GHz to 5GHz

M. Sato, H. Abe, M. Hamada, H. Majima, T. Kuroda, H. Ishikuro

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

This paper reports a highly linear RF sampler with wide operating frequency range and power supply range. A clock bootstrapping circuit is proposed to decrease both the on-resistance and off-leakage of advanced MOSFETs while considering the device reliability. The proposed RF sampler circuit has been implemented in 90nm CMOS process, and excellent IIP3 has been obtained at wide frequency range up to 5GHz and 2GHz when the power supply is 1.2V and 0.5V, respectively.

本文言語English
ホスト出版物のタイトルProceedings of the 2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009
ページ391-394
ページ数4
DOI
出版ステータスPublished - 2009
イベント2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009 - Boston, MA, United States
継続期間: 2009 6月 72009 6月 9

出版物シリーズ

名前Digest of Papers - IEEE Radio Frequency Integrated Circuits Symposium
ISSN(印刷版)1529-2517

Other

Other2009 IEEE Radio Frequency Integrated Circuits Symposium, RFIC 2009
国/地域United States
CityBoston, MA
Period09/6/709/6/9

ASJC Scopus subject areas

  • 工学(全般)

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