A full-CMOS single chip bluetooth LSI with 1.5 MHz-IF receiver and direct modulation transmitter

Fumitoshi Hatori, Hiroki Ishikuro, Mototsugu Hamada, Ken Ichi Agawa, Shouhei Kousai, Hiroyuki Kobayashi, Due Minh Nguyen

研究成果: Article

2 引用 (Scopus)

抜粋

This paper describes a full-CMOS single-chip Bluetooth LSI fabricated using a 0.18 μm CMOS, triple-well, quad-metal technology. The chip integrates radio and baseband, which is compliant with Bluetooth Core Specification version 1.1. A direct modulation transmitter and a low-IF receiver architecture are employed for the low-power and low-cost implementation. To reduce the power consumption of the digital blocks, it uses a clock gating technique during the active modes and a power manager during the low power modes. The maximum power consumption is 75 mW for the transmission, 120 mW for the reception and 30 μW for the low power mode operation. These values are low enough for mobile applications. Sensitivity of - 80 dBm has been achieved and the transmitter can deliver up to 4 dBm.

元の言語English
ページ(範囲)556-562
ページ数7
ジャーナルIEICE Transactions on Electronics
E87-C
発行部数4
出版物ステータスPublished - 2004 4
外部発表Yes

ASJC Scopus subject areas

  • Electronic, Optical and Magnetic Materials
  • Electrical and Electronic Engineering

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  • これを引用

    Hatori, F., Ishikuro, H., Hamada, M., Agawa, K. I., Kousai, S., Kobayashi, H., & Nguyen, D. M. (2004). A full-CMOS single chip bluetooth LSI with 1.5 MHz-IF receiver and direct modulation transmitter. IEICE Transactions on Electronics, E87-C(4), 556-562.