A low-power multi-frequency chopper-stabilized readout with time-domain delta-sigma modulator suitable for neural recording

Mikiyoshi Mikawa, Kenta Yagi, Kazuki Itakura, Leo Onuki, Nobuhiko Nakano

研究成果: Conference contribution

抄録

This paper presents a readout for multi-channel neural recording. The proposed architecture is implemented with a system-level frequency-division multiplexing technique and a time-domain delta-sigma modulator. Subthreshold region operation and the time-domain delta-sigma modulator achieves a reduction of the current dissipation. The multiplexing technique in the frequency domain enhances the power efficiency by sharing an instrumentation amplifier and the delta-sigma modulator in each channel. The proposed circuit employs a pulse-width summation technique to achieve frequency-division multiplexing in the time-domain delta-sigma modulator. The multiplexing technique of multiple frequency chopper stabilization can eliminate flicker noise and offsets. The proposed two-channel readout occupies 0.067 mm2 per channel and is designed with 0.18-µm CMOS technology. The spurious-free dynamic range is up to 50 dB in a bandwidth of 625 Hz with a low power consumption of 520 nW per channel.

本文言語English
ホスト出版物のタイトルICECS 2020 - 27th IEEE International Conference on Electronics, Circuits and Systems, Proceedings
出版社Institute of Electrical and Electronics Engineers Inc.
ISBN(電子版)9781728160443
DOI
出版ステータスPublished - 2020 11 23
イベント27th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2020 - Glasgow, United Kingdom
継続期間: 2020 11 232020 11 25

出版物シリーズ

名前ICECS 2020 - 27th IEEE International Conference on Electronics, Circuits and Systems, Proceedings

Conference

Conference27th IEEE International Conference on Electronics, Circuits and Systems, ICECS 2020
CountryUnited Kingdom
CityGlasgow
Period20/11/2320/11/25

ASJC Scopus subject areas

  • Electrical and Electronic Engineering

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