A low power reconfigurable accelerator using a back-gate bias control technique

Hongliang Su, Weihan Wang, Kuniaki Kitamori, Hideharu Amano

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

Leakage power is a serious problem especially for accerelators which use a large size Processing Element (PE) array. Here, a low power reconfigurable accelerator called Cool Mega Array (CMA) with back-gate bias control (CMA-bb) is implemented and evaluated. In CMA-bb, the back-gate bias of the microcontroller and PE array can be controlled independently. In the idle mode, reverse bias is given to the both parts to suppress the leakage current. When high performance is required, forward bias is used to increase the clock frequency. For simple applications, the operational power can be suppressed by using reverse bias only in the PE array. The real chip is implemented with a 65nm experimental process for low leakage applications. The evaluation results show that the leakage current can be suppressed to 300μA by using the reverse bias. The operational frequency is increased from 39MHz to 50MHz with up to 21% increase of operational power by using the forward bias. For simple applications, 8% to 9.4% of operational power is saved by giving reverse bias only to the PE array.

本文言語English
ホスト出版物のタイトルFPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology
ページ390-393
ページ数4
DOI
出版ステータスPublished - 2013 12 1
イベント2013 12th International Conference on Field-Programmable Technology, FPT 2013 - Kyoto, Japan
継続期間: 2013 12 92013 12 11

出版物シリーズ

名前FPT 2013 - Proceedings of the 2013 International Conference on Field Programmable Technology

Other

Other2013 12th International Conference on Field-Programmable Technology, FPT 2013
CountryJapan
CityKyoto
Period13/12/913/12/11

ASJC Scopus subject areas

  • Software

フィンガープリント 「A low power reconfigurable accelerator using a back-gate bias control technique」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル