A multilevel NOSQL cache design combining In-NIC and In-Kernel caches

Yuta Tokusashi, Hiroki Matsutani

研究成果: Conference contribution

11 被引用数 (Scopus)

抄録

Since a large-scale in-memory data store, such as key-value store (KVS), is an important software platform for data centers, this paper focuses on an FPGA-based custom hardware to further improve the efficiency of KVS. Although such FPGA-based KVS accelerators have been studied and shown a high performance per Watt compared to software-based processing, since their cache capacity is strictly limited by the DRAMs implemented on FPGA boards, their application domain is also limited. To address this issue, in this paper, we propose a multilevel NOSQL cache architecture that utilizes both the FPGA-based hardware cache and an in-kernel software cache in a complementary style. They are referred as L1 and L2 NOSQL caches, respectively. The proposed multilevel NOSQL cache architecture motivates us to explore various design options, such as cache write and inclusion policies between L1 and L2 NOSQL caches. We implemented a prototype system of the proposed multilevel NOSQL cache using NetFPGA-10G board and Linux Netfilter framework. Based on the prototype implementation, we explore the various design options for the multilevel NOSQL caches. Simulation results show that our multilevel NOSQL cache design reduces the cache miss ratio and improves the throughput compared to the non-hierarchical design.

本文言語English
ホスト出版物のタイトルProceedings - 2016 IEEE 24th Annual Symposium on High-Performance Interconnects, HOTI 2016
出版社Institute of Electrical and Electronics Engineers Inc.
ページ60-67
ページ数8
ISBN(電子版)9781509028542
DOI
出版ステータスPublished - 2016 12 28
イベント24th IEEE Annual Symposium on High-Performance Interconnects, HOTI 2016 - Santa Clara, United States
継続期間: 2016 8 242016 8 26

出版物シリーズ

名前Proceedings - 2016 IEEE 24th Annual Symposium on High-Performance Interconnects, HOTI 2016

Other

Other24th IEEE Annual Symposium on High-Performance Interconnects, HOTI 2016
CountryUnited States
CitySanta Clara
Period16/8/2416/8/26

ASJC Scopus subject areas

  • Hardware and Architecture
  • Computer Networks and Communications

フィンガープリント 「A multilevel NOSQL cache design combining In-NIC and In-Kernel caches」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル