A new memory module for COTS-based personal supercomputing

Noboru Tanabe, Masasige Nakatake, Hirotaka Hakozaki, Yasunori Dohi, Hironori Nakajo, Hideharu Amano

研究成果: Conference contribution

11 引用 (Scopus)

抄録

This paper presents how to make inexpensive personal supercomputers getting the merit of commercial-off-the-shelf (COTS) continuously after the death of vector supercomputer venders. It is designed to realize this goal without any modification on CPU, bridge chips on motherboard and memory chips. Only plugging a new memory module with vector load/store function make an inexpensive home-use personal computer into a node similar to Earth simulator's one. These nodes can be connected by COTS Infiniband 4X type or 12X type switches in order to make parallel systems. COTS SO-DIMMs on the memory modules can be accessed fastly by remote nodes by using AOTF, BOTF, RDMA and remote vector load/store operations. Applications with unit striding or indexed accesses are going to be accelerated. How to accelerate NAS CG class B is shown as an example. Used evaluation methodlogy is about 500 times faster than that of SimpleScalar based methodlogy. It is predicted with bandwidth analysis that up to 8.75 times improvement can be achieved by proposed system for a single CPU Pentium4 PC without parallel processing.

元の言語English
ホスト出版物のタイトルProceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems
編集者A. Veidenbaum, H. Nakajo
ページ40-48
ページ数9
DOI
出版物ステータスPublished - 2004
イベントProceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2004 - Maui, HI, United States
継続期間: 2004 1 122004 1 14

Other

OtherProceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2004
United States
Maui, HI
期間04/1/1204/1/14

Fingerprint

Supercomputers
Data storage equipment
Program processors
Personal computers
Simulators
Earth (planet)
Switches
Bandwidth
Processing

ASJC Scopus subject areas

  • Computer Science(all)

これを引用

Tanabe, N., Nakatake, M., Hakozaki, H., Dohi, Y., Nakajo, H., & Amano, H. (2004). A new memory module for COTS-based personal supercomputing. : A. Veidenbaum, & H. Nakajo (版), Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems (pp. 40-48) https://doi.org/10.1109/IWIA.2004.10019

A new memory module for COTS-based personal supercomputing. / Tanabe, Noboru; Nakatake, Masasige; Hakozaki, Hirotaka; Dohi, Yasunori; Nakajo, Hironori; Amano, Hideharu.

Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems. 版 / A. Veidenbaum; H. Nakajo. 2004. p. 40-48.

研究成果: Conference contribution

Tanabe, N, Nakatake, M, Hakozaki, H, Dohi, Y, Nakajo, H & Amano, H 2004, A new memory module for COTS-based personal supercomputing. : A Veidenbaum & H Nakajo (版), Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems. pp. 40-48, Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems, IWIA 2004, Maui, HI, United States, 04/1/12. https://doi.org/10.1109/IWIA.2004.10019
Tanabe N, Nakatake M, Hakozaki H, Dohi Y, Nakajo H, Amano H. A new memory module for COTS-based personal supercomputing. : Veidenbaum A, Nakajo H, 編集者, Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems. 2004. p. 40-48 https://doi.org/10.1109/IWIA.2004.10019
Tanabe, Noboru ; Nakatake, Masasige ; Hakozaki, Hirotaka ; Dohi, Yasunori ; Nakajo, Hironori ; Amano, Hideharu. / A new memory module for COTS-based personal supercomputing. Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems. 編集者 / A. Veidenbaum ; H. Nakajo. 2004. pp. 40-48
@inproceedings{f693a27ba8b04f0884a246401eb5ab18,
title = "A new memory module for COTS-based personal supercomputing",
abstract = "This paper presents how to make inexpensive personal supercomputers getting the merit of commercial-off-the-shelf (COTS) continuously after the death of vector supercomputer venders. It is designed to realize this goal without any modification on CPU, bridge chips on motherboard and memory chips. Only plugging a new memory module with vector load/store function make an inexpensive home-use personal computer into a node similar to Earth simulator's one. These nodes can be connected by COTS Infiniband 4X type or 12X type switches in order to make parallel systems. COTS SO-DIMMs on the memory modules can be accessed fastly by remote nodes by using AOTF, BOTF, RDMA and remote vector load/store operations. Applications with unit striding or indexed accesses are going to be accelerated. How to accelerate NAS CG class B is shown as an example. Used evaluation methodlogy is about 500 times faster than that of SimpleScalar based methodlogy. It is predicted with bandwidth analysis that up to 8.75 times improvement can be achieved by proposed system for a single CPU Pentium4 PC without parallel processing.",
author = "Noboru Tanabe and Masasige Nakatake and Hirotaka Hakozaki and Yasunori Dohi and Hironori Nakajo and Hideharu Amano",
year = "2004",
doi = "10.1109/IWIA.2004.10019",
language = "English",
pages = "40--48",
editor = "A. Veidenbaum and H. Nakajo",
booktitle = "Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems",

}

TY - GEN

T1 - A new memory module for COTS-based personal supercomputing

AU - Tanabe, Noboru

AU - Nakatake, Masasige

AU - Hakozaki, Hirotaka

AU - Dohi, Yasunori

AU - Nakajo, Hironori

AU - Amano, Hideharu

PY - 2004

Y1 - 2004

N2 - This paper presents how to make inexpensive personal supercomputers getting the merit of commercial-off-the-shelf (COTS) continuously after the death of vector supercomputer venders. It is designed to realize this goal without any modification on CPU, bridge chips on motherboard and memory chips. Only plugging a new memory module with vector load/store function make an inexpensive home-use personal computer into a node similar to Earth simulator's one. These nodes can be connected by COTS Infiniband 4X type or 12X type switches in order to make parallel systems. COTS SO-DIMMs on the memory modules can be accessed fastly by remote nodes by using AOTF, BOTF, RDMA and remote vector load/store operations. Applications with unit striding or indexed accesses are going to be accelerated. How to accelerate NAS CG class B is shown as an example. Used evaluation methodlogy is about 500 times faster than that of SimpleScalar based methodlogy. It is predicted with bandwidth analysis that up to 8.75 times improvement can be achieved by proposed system for a single CPU Pentium4 PC without parallel processing.

AB - This paper presents how to make inexpensive personal supercomputers getting the merit of commercial-off-the-shelf (COTS) continuously after the death of vector supercomputer venders. It is designed to realize this goal without any modification on CPU, bridge chips on motherboard and memory chips. Only plugging a new memory module with vector load/store function make an inexpensive home-use personal computer into a node similar to Earth simulator's one. These nodes can be connected by COTS Infiniband 4X type or 12X type switches in order to make parallel systems. COTS SO-DIMMs on the memory modules can be accessed fastly by remote nodes by using AOTF, BOTF, RDMA and remote vector load/store operations. Applications with unit striding or indexed accesses are going to be accelerated. How to accelerate NAS CG class B is shown as an example. Used evaluation methodlogy is about 500 times faster than that of SimpleScalar based methodlogy. It is predicted with bandwidth analysis that up to 8.75 times improvement can be achieved by proposed system for a single CPU Pentium4 PC without parallel processing.

UR - http://www.scopus.com/inward/record.url?scp=17444429658&partnerID=8YFLogxK

UR - http://www.scopus.com/inward/citedby.url?scp=17444429658&partnerID=8YFLogxK

U2 - 10.1109/IWIA.2004.10019

DO - 10.1109/IWIA.2004.10019

M3 - Conference contribution

AN - SCOPUS:17444429658

SP - 40

EP - 48

BT - Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems

A2 - Veidenbaum, A.

A2 - Nakajo, H.

ER -