TY - GEN
T1 - A preemption algorithm for a multitasking environment on dynamically reconfigurable processor
AU - Tuan, Vu Manh
AU - Amano, Hideharu
PY - 2008/9/22
Y1 - 2008/9/22
N2 - Task preemption is a critical mechanism for building an effective multitasking environment on dynamically reconfigurable processors. When being preempted, necessary state information of the interrupted task in registers and distributed internal memories must be correctly preserved. This paper aims at studying a method for saving and restoring the state data of a hardware task, executing on a dynamically reconfigurable processing array, taking into account the great amount and the distribution on different storage elements of data. Performance degradation caused by task preemption is minimized by allowing preemption only at predefined points where demanded resources are small. Specifically, we propose: 1) algorithms to insert preemption points subject to user-specified preemption latency and resource overhead constraints; 2) modification steps to incorporate the offered algorithms on the system design flow. Evaluation results on the NEC DRP architecture show that the proposed method achieves a reasonable hardware overhead (from 6% to 14%) while satisfying a given preemption latency.
AB - Task preemption is a critical mechanism for building an effective multitasking environment on dynamically reconfigurable processors. When being preempted, necessary state information of the interrupted task in registers and distributed internal memories must be correctly preserved. This paper aims at studying a method for saving and restoring the state data of a hardware task, executing on a dynamically reconfigurable processing array, taking into account the great amount and the distribution on different storage elements of data. Performance degradation caused by task preemption is minimized by allowing preemption only at predefined points where demanded resources are small. Specifically, we propose: 1) algorithms to insert preemption points subject to user-specified preemption latency and resource overhead constraints; 2) modification steps to incorporate the offered algorithms on the system design flow. Evaluation results on the NEC DRP architecture show that the proposed method achieves a reasonable hardware overhead (from 6% to 14%) while satisfying a given preemption latency.
UR - http://www.scopus.com/inward/record.url?scp=51849085212&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=51849085212&partnerID=8YFLogxK
U2 - 10.1007/978-3-540-78610-8_18
DO - 10.1007/978-3-540-78610-8_18
M3 - Conference contribution
AN - SCOPUS:51849085212
SN - 3540786090
SN - 9783540786092
T3 - Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
SP - 172
EP - 184
BT - Reconfigurable Computing
T2 - 4th International Workshop on Applied Reconfigurable Computing, ARC 2008
Y2 - 26 March 2008 through 28 March 2008
ER -