A Preliminary evaluation of building block computing systems

Sayaka Terashima, Takuya Kojima, Hayate Okuhara, Kazusa Musha, Hideharu Amano, Ryuichi Sakamoto, Masaaki Kondo, Mitaro Namiki

研究成果: Conference contribution

抜粋

A building block computing system with inductive coupling Through Chip Interface (TCI) consists of 3-D chip stack, each of which is small dedicated chips. By changing the combination of stacked chips, various types of systems can be built. A MIPS R3000 compatible processor GeyserTT, a neural network accelerator SNACC and the shared memory for building the twin-Tower of chips SMTT have been developed with a Renesas 65nm low leakage CMOS process. They provide the TCI IP (Intellectual Property), and an escalator network is built just by stacking them. This paper shows each chip evaluation results and performance estimation of stacking them with the RTL simulator. The performance of the single-Tower and twin-Tower configuration is estimated by RTL simulation when a part of Alexnet is implemented. The evaluation results showed that the single-Tower configuration with GeyserTT+SNACC achieved about twice performance as the case with GeyserTT. Also, experimental results using each of the single real chip showed that all of them work at least 50MHz with extremely low power consumption. The twin-Tower configuration achieved about 2x of the single-Tower, that is about 6x of GeyserTT. The power consumption was about 276mW for the single-Tower and 496mW for the twin-Tower.

元の言語English
ホスト出版物のタイトルProceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019
出版者Institute of Electrical and Electronics Engineers Inc.
ページ312-319
ページ数8
ISBN(電子版)9781728148823
DOI
出版物ステータスPublished - 2019 10
イベント13th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019 - Singapore, Singapore
継続期間: 2019 10 12019 10 4

出版物シリーズ

名前Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019

Conference

Conference13th IEEE International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019
Singapore
Singapore
期間19/10/119/10/4

    フィンガープリント

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Hardware and Architecture
  • Electrical and Electronic Engineering
  • Control and Optimization

これを引用

Terashima, S., Kojima, T., Okuhara, H., Musha, K., Amano, H., Sakamoto, R., Kondo, M., & Namiki, M. (2019). A Preliminary evaluation of building block computing systems. : Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019 (pp. 312-319). [8906777] (Proceedings - 2019 IEEE 13th International Symposium on Embedded Multicore/Many-Core Systems-on-Chip, MCSoC 2019). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/MCSoC.2019.00051