A software development environment for a multi-chip convolutional network accelerator

A building block convolutional neural network accelerator consists of a host and multiple accelerator chips which can scale the performance by changing the number of stacked chips. In order to program the host and the accelerators, an integrated programming development environment called NAMACHA is proposed. It includes compilers for convolutional neural network accelerators and a system level simulator including inter-chip communication latency. On the simulator, the total application runs 4390x faster than that of the logic level simulation with 1.27% difference of clock cycle counts. The simulation results of implementing AlexNet, SIMD instructions provided in the accelerator improved the performance by 70% on average. It demonstrates that NAMACHA can be used for architectural exploration as well as development of practical software.