A study on interconnection networks of the dynamically reconfigurable processor array MuCCRA

Masaru Kato, Toru Sano, Yoshihiro Yasuda, Yoshiki Saito, Hideharu Amano

研究成果: Conference contribution

2 被引用数 (Scopus)

抄録

A Dynamically Reconfigurable Processor Array (DRPA) is consisting of a number of PEs, and its interconnection of PE array gives a large effect on the total area, energy and performance. However, there is no study of DRPAs focused on their PE network. In this paper, we designed four types of DRPAs based on MuCCRA, developed in MuCCRA(Multi-Core Configurable Reconfigurable Architecture) project. They have different topologies, which are direct interconnection, island-style interconnection and two kinds of hybrid interconnection. They are evaluated using three different PE array sizes. As a result, a MuCCRA with hybrid network, which has the highest degree of connectivity, is able to execute DCT faster than the other MuCCRAs, but requires more area by 20% than MuCCRA with direct network. On energy consumption, MuCCRA with direct links consumes 7 times more energy at maximum than island-style-interconnected MuCCRAs.

本文言語English
ホスト出版物のタイトルProceedings of the 2009 International Conference on Field-Programmable Technology, FPT'09
ページ415-418
ページ数4
DOI
出版ステータスPublished - 2009 12月 1
イベント2009 International Conference on Field-Programmable Technology, FPT'09 - Sydney, Australia
継続期間: 2009 12月 92009 12月 11

出版物シリーズ

名前Proceedings of the 2009 International Conference on Field-Programmable Technology, FPT'09

Other

Other2009 International Conference on Field-Programmable Technology, FPT'09
国/地域Australia
CitySydney
Period09/12/909/12/11

ASJC Scopus subject areas

  • 計算理論と計算数学
  • ハードウェアとアーキテクチャ
  • ソフトウェア

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