抄録
Dynamically reconfigurable processors are consisting of an array of processing elements whose functions and interconnections can be dynamically changed. 9 commercial systems are picked up, and their array structures, processing elements and interconnection architectures are classified.
本文言語 | English |
---|---|
ページ(範囲) | 3179-3187 |
ページ数 | 9 |
ジャーナル | IEICE Transactions on Communications |
巻 | E89-B |
号 | 12 |
DOI | |
出版ステータス | Published - 2006 12 |
ASJC Scopus subject areas
- Software
- Computer Networks and Communications
- Electrical and Electronic Engineering