A VC-merge capable switch reducing buffer requirement by sharing reassembly buffers in MPLS

Kenji Sakamoto, Yoshiyuki Nishino, Iwao Sasase

研究成果: Paper査読

抄録

In MPLS(MultiProtocol Label Switching), VC-merge(Virtual Circuit-merge) is known as a scalable technique to reduce the total number of VC. However, in the conventional VC-merge capable switch, the number of reassembly buffers greatly increases as switch size grows large. In this paper, we propose a VC-merge capable switch with less buffer requirement. In the proposed model, we can reduce the number of reassembly buffers and decrease the access speed of buffer memory since we can share reassembly buffers between the cells arrived at all input ports by controller. We compare the packet loss probability and the mean system delay performance of the proposed model with those of the conventional model by computer simulations. As a result, we show that the number of reassembly buffers decreases on the order of O(N) and the access speed of buffer memory becomes low. Therefore, the proposed model is effective in MPLS.

本文言語English
ページ40-44
ページ数5
出版ステータスPublished - 2001 12月 1
イベントIEEE Global Telecommunicatins Conference GLOBECOM'01 - San Antonio, TX, United States
継続期間: 2001 11月 252001 11月 29

Other

OtherIEEE Global Telecommunicatins Conference GLOBECOM'01
国/地域United States
CitySan Antonio, TX
Period01/11/2501/11/29

ASJC Scopus subject areas

  • 電子工学および電気工学
  • 地球変動および惑星変動

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