A wireless real-time on-chip bus trace system

Shusuke Kawai; Takayuki Ikari; Yutaka Takikawa; Hiroki Ishikuro; Tadahiro Kuroda

doi:10.1109/ASPDAC.2009.4796447

A wireless real-time on-chip bus trace system

Shusuke Kawai, Takayuki Ikari, Yutaka Takikawa, Hiroki Ishikuro, Tadahiro Kuroda

研究成果: Conference contribution

1 被引用数 (Scopus)

抄録

A 480Mb/s wireless real-time bus trace system with a pulse-based inductive coupling channel array was developed using a 0.25nm CMOS digital process. The size and pitch of the inductor array are determined by numerical calculation to optimize the tradeoff between the channel coupling, crosstalk, and alignment tolerance. A low-power quasi-synchronous system is proposed to obtain an enough timing margin for RX pulse detection under the presence of the clock skew.

本文言語	English
ホスト出版物のタイトル	Proceedings of the ASP-DAC 2009
ホスト出版物のサブタイトル	Asia and South Pacific Design Automation Conference 2009
ページ	91-92
ページ数	2
DOI	https://doi.org/10.1109/ASPDAC.2009.4796447
出版ステータス	Published - 2009 4月 20
イベント	Asia and South Pacific Design Automation Conference 2009, ASP-DAC 2009 - Yokohama, Japan 継続期間: 2009 1月 19 → 2009 1月 22

出版物シリーズ

名前	Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC

Other

Other	Asia and South Pacific Design Automation Conference 2009, ASP-DAC 2009
国/地域	Japan
City	Yokohama
Period	09/1/19 → 09/1/22

ASJC Scopus subject areas

コンピュータサイエンスの応用
コンピュータグラフィックスおよびコンピュータ支援設計
電子工学および電気工学

文献へのアクセス

10.1109/ASPDAC.2009.4796447

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引用スタイル

Kawai, S, Ikari, T, Takikawa, Y, Ishikuro, H & Kuroda, T 2009, A wireless real-time on-chip bus trace system. in Proceedings of the ASP-DAC 2009: Asia and South Pacific Design Automation Conference 2009., 4796447, Proceedings of the Asia and South Pacific Design Automation Conference, ASP-DAC, pp. 91-92, Asia and South Pacific Design Automation Conference 2009, ASP-DAC 2009, Yokohama, Japan, 09/1/19. https://doi.org/10.1109/ASPDAC.2009.4796447

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A wireless real-time on-chip bus trace system

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