抄録
This paper describes advanced ATM switching system hardware that uses a high-performance and cost-effective MCM-D module as an ATM-layer function device. The MCM-D module is fabricated on a Si-substrate using the stacking RAM technique to reduce module size. The MCM has a 4-layer Si substrate, a high-performance ASIC, 8 high-speed SRAMs, and an FPGA. By using the stacking RAM technique, MCM-D module size is reduced to 50.8mm x 50.8mm. This is 40% ofthat (100mm x 65mm) of a double-side mounted sub-board module with conventional packaging (QFP and SOP). The MCM-D module realizes the ATM-layer functions that require a highperformance ASIC with a high-speed (access time 20ns) and large-capacity (l MBytes) SRAM cache. The MCM approach is quite effective in increasing memory access speed because it realizes high-density packaging. The MCM-D module is mounted on an ATM line interface circuit, and realizes 150 Mbit/s throughput ATM-layer functions (header conversion and on-line monitoring) in an ATM switching system. In addition, advanced ATM switching system hardware technologies with sub-module structure are also described. The MCM-D module is one of the sub-modules of the system. This MCM technology and sub-module technology can be applied to advanced ATM switching systems.
本文言語 | English |
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ページ(範囲) | 482-487 |
ページ数 | 6 |
ジャーナル | IEICE Transactions on Communications |
巻 | E81-B |
号 | 2 |
出版ステータス | Published - 1998 1月 1 |
外部発表 | はい |
ASJC Scopus subject areas
- ソフトウェア
- コンピュータ ネットワークおよび通信
- 電子工学および電気工学