Advanced ATM switching system line interface hardware technologies based on MCM-D integrated with ASIC and S-RAMS

Naoaki Yamanaka, Tomoaki Kawamura, Katsumi Kaizu

研究成果: Paper査読

2 被引用数 (Scopus)

抄録

This paper describes newly developed advanced ATM switching system hardware structures. They are based on the Si-Substrate MCM-D technology which integrates ASIC custom VLSIs, high-speed S-RAMs and FPGAs (Field Programmable Gate Arrays). The MCM-D module realizes the ATM layer function by combining a high-performance ASIC with high-speed S-RAM cache. This is made possible by high density packaging and high-speed (20 ns) access to 1-Mbit of memory. The MCM employs 8 S-RAMs, possible with the stacked RAM technique, to reduce module size. This sub-module technology and MCM technology will advance the development of practical B-ISDN ATM switching systems.

本文言語English
ページ286-289
ページ数4
出版ステータスPublished - 1997 1 1
外部発表はい
イベントProceedings of the 1997 IEEE/CPMT 20th International Electronic Manufacturing Symposium - Tokyo, Jpn
継続期間: 1997 4 161997 4 18

Other

OtherProceedings of the 1997 IEEE/CPMT 20th International Electronic Manufacturing Symposium
CityTokyo, Jpn
Period97/4/1697/4/18

ASJC Scopus subject areas

  • 産業および生産工学
  • 電子工学および電気工学

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