An integration of imprecise computation model and real-time voltage and frequency scaling on responsive multithreaded processor

Keigo Mizotani, Yusuke Hatori, Yusuke Kumura, Masayoshi Takasu, Hiroyuki Chishiro, Nobuyuki Yamasaki

研究成果: Article査読

2 被引用数 (Scopus)

抄録

As microprocessor performance grows, high throughput and power management have been important on embedded real-time systems. Real-Time Voltage and Frequency Scaling (RT-VFS) has been proposed to reduce power consumption and ensure real-time constraints. An imprecise computation model adds an optional part to Liu and Layland’s model to improve the quality of computations. However, the trade-off between power consumption and quality of computations has not been well investigated on actual systems. This paper proposes the scheme to integrate an imprecise computation model and RT-VFS to improve the quality of computations and reduce the power consumption within real-time constraints. Moreover, we implement this scheme on Dependable Responsive Multithreaded Processor (D-RMTP), which is a prioritized simultaneous multithreaded processor for embedded real-time systems. We implement the proposed scheme by use of D-RMTP original features. Through experimental evaluation, we show that the proposed scheme satisfies both the lower energy consumption and higher quality of computations on actual systems. In particular, the proposed scheme achieves a maximum of 135% improvement of the quality of computations per energy consumption.

本文言語English
ページ(範囲)128-136
ページ数9
ジャーナルInternational Journal of Computers and their Applications
22
3
出版ステータスPublished - 2015 9月

ASJC Scopus subject areas

  • コンピュータ サイエンス(全般)

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