An On-Chip Scalable Low Power Consumption High-Voltage Driver Based on Standard CMOS Technology

Jorge Canada, Yui Yoshida, Hiroki Miura, Nobuhiko Nakano

研究成果: Conference contribution

抄録

A scalable low power consumption high-voltage driver comprising only standard low-voltage CMOS transistors is proposed. The circuit is a Stacked MOSFET high-voltage driver. The proposed design stands out for its low power consumption (in the order of microwatts), small area, scalability and self-sufficiency. The main setbacks to be considered are its low switching speed, in the order of microseconds, and the fact that its applicability is limited to capacitive loads and high resistive loads. This paper reports simulation results obtained through the implementation of multiple designs in 0.18 um CMOS technology.

本文言語English
ホスト出版物のタイトルProceedings - International SoC Design Conference, ISOCC 2020
出版社Institute of Electrical and Electronics Engineers Inc.
ページ17-18
ページ数2
ISBN(電子版)9781728183312
DOI
出版ステータスPublished - 2020 10 21
イベント17th International System-on-Chip Design Conference, ISOCC 2020 - Yeosu, Korea, Republic of
継続期間: 2020 10 212020 10 24

出版物シリーズ

名前Proceedings - International SoC Design Conference, ISOCC 2020

Conference

Conference17th International System-on-Chip Design Conference, ISOCC 2020
CountryKorea, Republic of
CityYeosu
Period20/10/2120/10/24

ASJC Scopus subject areas

  • Energy Engineering and Power Technology
  • Electrical and Electronic Engineering
  • Instrumentation
  • Artificial Intelligence
  • Hardware and Architecture

フィンガープリント 「An On-Chip Scalable Low Power Consumption High-Voltage Driver Based on Standard CMOS Technology」の研究トピックを掘り下げます。これらがまとまってユニークなフィンガープリントを構成します。

引用スタイル