Balanced dimension-order routing for k-ary n-cubes

Jose Miguel Montañana, Michihiro Koibuchi, Hiroki Matsutani, Hideharu Amano

研究成果: Conference contribution

12 被引用数 (Scopus)

抄録

Current Network-on-Chip (NoC) architectures sometimes employ mesh or torus topology with the dimensionorder routing. In this paper, we propose a deadlock-free routing algorithm, referred to as Balanced Dimension-Order Routing (BDOR), which provides the balanced minimal paths to each destination based on the simple routing regulations. Since the BDOR has the similar path regularity to that of the dimensionorder routing, its implementation can be lightweight, and most of its modules can be borrowed from the router for the dimension-order routing. Evaluation results show that the BDOR router increases by 3.4% hardware amount compared with the router for the dimension-order routing. Also show that the throughput of the BDOR outperforms on average up to 14% that of the dimension-order routing on two-dimensional mesh and torus.

本文言語English
ホスト出版物のタイトルICPPW 2009 - The 38th International Conference Parallel Processing Workshops
ページ499-506
ページ数8
DOI
出版ステータスPublished - 2009
イベント38th International Conference Parallel Processing Workshops, ICPPW 2009 - Vienna, Austria
継続期間: 2009 9 222009 9 25

出版物シリーズ

名前Proceedings of the International Conference on Parallel Processing Workshops
ISSN(印刷版)1530-2016

Other

Other38th International Conference Parallel Processing Workshops, ICPPW 2009
国/地域Austria
CityVienna
Period09/9/2209/9/25

ASJC Scopus subject areas

  • ソフトウェア
  • 数学 (全般)
  • ハードウェアとアーキテクチャ

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