A Si bipolar very high-speed 8-channel multiplied by 8-bit Serial/Parallel and Parallel/Serial conversion LSI (SPPS-LSI), having 1. 5 Gb/s throughput is developed for high-speed digital communication systems. To achieve high performance, a novel data conversion method is adopted. By applying a sophisticated circuit design and SST-1A process technology, a high-speed and low-power LSI is achieved with small chip size.
|ホスト出版物のタイトル||Conference on Solid State Devices and Materials|
|出版社||Business Cent for Academic Soc Japan|
|出版ステータス||Published - 1986 12月 1|
|名前||Conference on Solid State Devices and Materials|
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