抄録
Code density is often a critical issue in embedded computers, since the memory size of embedded systems is strictly limited. Echo instructions have been proposed as a method for reducing code size. This paper presents a new type of echo instruction, split echo, and evaluates an implementation of both split echo and traditional echo instructions on a MIPS R3000 based processor. Evaluation results show that memory requirement is reduced by 12% on average with small additional hardware cost.
本文言語 | English |
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ページ(範囲) | 1650-1656 |
ページ数 | 7 |
ジャーナル | IEICE Transactions on Information and Systems |
巻 | E92-D |
号 | 9 |
DOI | |
出版ステータス | Published - 2009 |
ASJC Scopus subject areas
- Software
- Hardware and Architecture
- Computer Vision and Pattern Recognition
- Electrical and Electronic Engineering
- Artificial Intelligence