Cool mega-arrays: Ultralow-power reconfigurable accelerator chips

Nobuaki Ozaki, Yoshihiro Yasuda, Mai Izawa, Yoshiki Saito, Daisuke Ikebuchi, Hideharu Amano, Hiroshi Nakamura, Kimiyoshi Usami, Mitaro Namiki, Masaaki Kondo

研究成果: Article

39 引用 (Scopus)

抜粋

Cool Mega-Array (CMA) is an energy-efficient reconfigurable accelerator for battery-driven mobile devices. It has a large processing-element array without memory elements for mapping an application's data-flow graph, a simple programmable microcontroller for data management, and data memory. Unlike coarse-grained dynamically reconfigurable processors, CMA reduces power consumption by switching hardware context and storing intermediate data in registers.

元の言語English
記事番号6060791
ページ(範囲)6-18
ページ数13
ジャーナルIEEE Micro
31
発行部数6
DOI
出版物ステータスPublished - 2011 11 1

ASJC Scopus subject areas

  • Software
  • Hardware and Architecture
  • Electrical and Electronic Engineering

フィンガープリント Cool mega-arrays: Ultralow-power reconfigurable accelerator chips' の研究トピックを掘り下げます。これらはともに一意のフィンガープリントを構成します。

  • これを引用

    Ozaki, N., Yasuda, Y., Izawa, M., Saito, Y., Ikebuchi, D., Amano, H., Nakamura, H., Usami, K., Namiki, M., & Kondo, M. (2011). Cool mega-arrays: Ultralow-power reconfigurable accelerator chips. IEEE Micro, 31(6), 6-18. [6060791]. https://doi.org/10.1109/MM.2011.94