D-tdma data buses with CSMA/CD arbitration bus on wireless 3D IC

Go Matsumura, Michihiro Koibuchi, Hideharu Amano, Hiroki Matsutani

研究成果: Conference contribution

抄録

Because of the increase in cost for chip fabrication, design-ing a chip family in accordance with the application is be-coming an expensive choice. Wireless 3D IC design offers flexibility to connect known-good-dies selected after chip fabrication. It can stack an arbitrary number of chips at low cost. In this paper, dynamic time division multiple access (D-TDMA) is used for vertical broadcast buses for high communication efficiency of interchip network. However, to implement simple D-TDMA based 3D IC, large area and energy overheads are needed for arbitration since another inductor is needed for sending just several bits as arbitra-tion signal in addition to an inductor for the data transfer. We resolve this problem to employ a carrier sense multiple access with collision detection (CSMA/CD) for arbitration of D-TDMA vertical broadcast buses. Evaluation results show that the proposed bus architecture reduces the num-ber of inductors by 73.6% compared to a simple counter-part which employs D-TDMA based 3D buses. The results also show that an application execution time increases only by 0.3% at most.

本文言語English
ホスト出版物のタイトルProceedings of the 13th IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2016
出版社Acta Press
ページ242-249
ページ数8
ISBN(電子版)9780889869790
DOI
出版ステータスPublished - 2016
イベント13th IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2016 - Innsbruck, Austria
継続期間: 2016 2 152016 2 16

Other

Other13th IASTED International Conference on Parallel and Distributed Computing and Networks, PDCN 2016
CountryAustria
CityInnsbruck
Period16/2/1516/2/16

ASJC Scopus subject areas

  • Computer Networks and Communications
  • Software

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