Data Rearrange Unit for Efficient Data Computation in Embedded Systems

Akiyuki Mamiya, Nobuyuki Yamasaki

研究成果: Conference contribution

抄録

Recently demands for computation intensive applications such as convolutional neural networks (CNNs) have been increasing. In these applications, valid data for computation are allocated in non-continuous addresses. Therefore, common burst memory access pattern results in a low spatial locality of valid data per access. As a result, computation of data parallel execution units degrades in throughput, as computation resource is wasted by computing invalid data. This is especially a problem in embedded systems in which constraints in power consumption provoke a requirement for high computation efficiency. In this paper, we introduce a Data Rearrange Unit (DRU), a hardware unit rearranging computation data to increase spatial locality of valid data. The DRU drastically reduces the main memory access rate and increases computation efficiency by decreasing memory access to reduce power consumption. We demonstrate the effectiveness of our DRU by implementation on the RMTP SoC [1] [2] improving convolution throughput on a data parallel execution unit by a maximum of 94times, while only increasing the total cell area by about 13%.

本文言語English
ホスト出版物のタイトルProceedings - 2021 9th International Symposium on Computing and Networking Workshops, CANDARW 2021
出版社Institute of Electrical and Electronics Engineers Inc.
ページ101-106
ページ数6
ISBN(電子版)9781665428354
DOI
出版ステータスPublished - 2021
イベント9th International Symposium on Computing and Networking Workshops, CANDARW 2021 - Virtual, Online, Japan
継続期間: 2021 11月 232021 11月 26

出版物シリーズ

名前Proceedings - 2021 9th International Symposium on Computing and Networking Workshops, CANDARW 2021

Conference

Conference9th International Symposium on Computing and Networking Workshops, CANDARW 2021
国/地域Japan
CityVirtual, Online
Period21/11/2321/11/26

ASJC Scopus subject areas

  • 人工知能
  • コンピュータ ネットワークおよび通信
  • 情報システム
  • ソフトウェア

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