Demonstration of low power stream processing using a variable pipelined CGRA

Takuya Kojima, Naoki Ando, Yusuke Matsushita, Hideharu Amano

研究成果: Conference contribution

抄録

VPCMA (Variable Pipelined Cool Mega Array) is a low power CGRA (Coarse-Grained Reconfigurable Architecture) which we previously proposed in [1]. CC-SOTB2 is a real chip implementation of the VPCMA using Renesas 65-nm SOTB technology [2]. In this demonstration, we will show the power consumption of the CC-SOTB2 while performing a real image processing.

本文言語English
ホスト出版物のタイトルProceedings - 29th International Conference on Field-Programmable Logic and Applications, FPL 2019
編集者Ioannis Sourdis, Christos-Savvas Bouganis, Carlos Alvarez, Leonel Antonio Toledo Diaz, Pedro Valero, Xavier Martorell
出版社Institute of Electrical and Electronics Engineers Inc.
ページ411-412
ページ数2
ISBN(電子版)9781728148847
DOI
出版ステータスPublished - 2019 9
イベント29th International Conferenceon Field-Programmable Logic and Applications, FPL 2019 - Barcelona, Spain
継続期間: 2019 9 92019 9 13

出版物シリーズ

名前Proceedings - 29th International Conference on Field-Programmable Logic and Applications, FPL 2019

Conference

Conference29th International Conferenceon Field-Programmable Logic and Applications, FPL 2019
CountrySpain
CityBarcelona
Period19/9/919/9/13

ASJC Scopus subject areas

  • Instrumentation
  • Artificial Intelligence
  • Computer Science Applications
  • Hardware and Architecture

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