Design and analysis for ThruChip design for manufacturing (DFM)

Li Chung Hsu, Yasuhiro Take, Atsutake Kosuge, So Hasegawa, Junichiro Kadamoto, Tadahiro Kuroda

    研究成果: Conference contribution

    2 被引用数 (Scopus)

    抄録

    A 1GB/s ThruChip interface (TCI) test chip for wafer thinning, power mesh, and dummy metal fill impacts are analyzed and evaluated with test chip measurement and field solver simulation. The measurement results show that TCI coil dimension can be sized down as wafer thinning by following D/Z=3 rule. However, the experiment shows 20% power reduction by enlarging TCI coil (D/Z=6). The power mesh lies between TCI coils can dramatically decrease the TCI magnetic pulse strength and hence cause TCI to fail. Dummy metal within TCI coils has no impact on TCI transmission

    本文言語English
    ホスト出版物のタイトル20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015
    出版社Institute of Electrical and Electronics Engineers Inc.
    ページ46-47
    ページ数2
    ISBN(電子版)9781479977925
    DOI
    出版ステータスPublished - 2015 3 11
    イベント2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015 - Chiba, Japan
    継続期間: 2015 1 192015 1 22

    出版物シリーズ

    名前20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015

    Other

    Other2015 20th Asia and South Pacific Design Automation Conference, ASP-DAC 2015
    CountryJapan
    CityChiba
    Period15/1/1915/1/22

    ASJC Scopus subject areas

    • Computer Science Applications
    • Electrical and Electronic Engineering
    • Control and Systems Engineering
    • Modelling and Simulation

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