TY - JOUR
T1 - Digitally Assisted On-Chip Body Bias Tuning Scheme for Ultra Low-Power VLSI Systems
AU - Okuhara, Hayate
AU - Ben Ahmed, Akram
AU - Amano, Hideharu
PY - 2018/3/13
Y1 - 2018/3/13
N2 - Body bias control is one of the most efficient means to reduce leakage power, adjust process variation, and apply performance boost. However, such control incurs a certain power overhead that has to be reduced, especially in ultra low-power systems. In order to exploit the advantages of body bias control while guaranteeing power efficiency, an on-chip control scheme is required. Conventionally, on-chip body bias control relies on the use of digital-analog converters. However, such analog circuits require a high power supply voltage and an additional power source, resulting in a considerable power overhead and an increased system cost. In this paper, an on-chip ``Digitally assisted Automatic Body-bias Tuning'' (DABT) scheme for ultra low-power systems is proposed and evaluated. The proposed scheme controls the body bias voltage so as to meet the timing constraints of a given target system. Since DABT is based on ``Digitally assisted'' circuitries, it can decrease the power supply voltage to near-threshold region and, therefore, a significant amount of power overhead can be reduced. The proposed system is fabricated with the 65-nm silicon on thin box (SOTB) process, a fully depleted silicon on insulator technology. We demonstrate that the chip can achieve the expected functionality, even with 0.35 V of power supply voltage, and with only a few micro watts of power overhead. Moreover, the efficiency of the proposed system is evaluated with a MIPS processor, adopted as a case study. According to the obtained evaluation results, the proposed system can enable 80% of leakage reduction while maintaining the frequency required to meet the timing constraints of the adopted target MIPS processor.
AB - Body bias control is one of the most efficient means to reduce leakage power, adjust process variation, and apply performance boost. However, such control incurs a certain power overhead that has to be reduced, especially in ultra low-power systems. In order to exploit the advantages of body bias control while guaranteeing power efficiency, an on-chip control scheme is required. Conventionally, on-chip body bias control relies on the use of digital-analog converters. However, such analog circuits require a high power supply voltage and an additional power source, resulting in a considerable power overhead and an increased system cost. In this paper, an on-chip ``Digitally assisted Automatic Body-bias Tuning'' (DABT) scheme for ultra low-power systems is proposed and evaluated. The proposed scheme controls the body bias voltage so as to meet the timing constraints of a given target system. Since DABT is based on ``Digitally assisted'' circuitries, it can decrease the power supply voltage to near-threshold region and, therefore, a significant amount of power overhead can be reduced. The proposed system is fabricated with the 65-nm silicon on thin box (SOTB) process, a fully depleted silicon on insulator technology. We demonstrate that the chip can achieve the expected functionality, even with 0.35 V of power supply voltage, and with only a few micro watts of power overhead. Moreover, the efficiency of the proposed system is evaluated with a MIPS processor, adopted as a case study. According to the obtained evaluation results, the proposed system can enable 80% of leakage reduction while maintaining the frequency required to meet the timing constraints of the adopted target MIPS processor.
KW - Analog circuits
KW - automatic body biasing
KW - body bias control
KW - Delays
KW - Digital circuits
KW - Leakage currents
KW - near-threshold
KW - on-chip
KW - Power supplies
KW - system design.
KW - System-on-chip
KW - Ultra low-power designs
KW - Voltage control
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U2 - 10.1109/TCSI.2018.2811504
DO - 10.1109/TCSI.2018.2811504
M3 - Article
AN - SCOPUS:85043785961
JO - IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
JF - IEEE Transactions on Circuits and Systems I: Fundamental Theory and Applications
SN - 1549-8328
ER -