Dynamic VDD switching technique and mapping optimization in dynamically reconfigurable processor for efficient energy reduction

Tatsuya Yamamoto, Kazuei Hironaka, Yuki Hayakawa, Masayuki Kimura, Hideharu Amano, Kimiyoshi Usami

研究成果: Conference contribution

9 被引用数 (Scopus)

抄録

This paper describes a dynamic VDD switching technique to reduce energy dissipation of Dynamically Reconfigurable Processors. Either high or low supply is dynamically selected at each PE at the context-by-context basis. We designed a part of a PE array and applied this technique. A test chip fabricated in 65nm technology operated successfully. Detailed simulations revealed that energy reduction is hindered by energy overhead due to supply switching when we use even lower VDD. We propose a mapping optimization algorithm "PFCM" to minimize the overhead. PFCM reduced energy overhead by 90.8% and thereby the dynamic VDD switching technique reduced energy dissipation by up to 12.5% when running sepia filter, alpha blender and Laplacian filter programs.

本文言語English
ホスト出版物のタイトルReconfigurable Computing
ホスト出版物のサブタイトルArchitectures, Tools and Applications - 7th International Symposium, ARC 2011, Proceedings
ページ230-241
ページ数12
DOI
出版ステータスPublished - 2011
イベント7th International Symposium on Applied Reconfigurable Computing, ARC 2011 - Belfast, United Kingdom
継続期間: 2011 3 232011 3 25

出版物シリーズ

名前Lecture Notes in Computer Science (including subseries Lecture Notes in Artificial Intelligence and Lecture Notes in Bioinformatics)
6578 LNCS
ISSN(印刷版)0302-9743
ISSN(電子版)1611-3349

Other

Other7th International Symposium on Applied Reconfigurable Computing, ARC 2011
国/地域United Kingdom
CityBelfast
Period11/3/2311/3/25

ASJC Scopus subject areas

  • 理論的コンピュータサイエンス
  • コンピュータ サイエンス(全般)

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