Exploiting hardware reconfigurability on window join

Eric Shun Fukuda, Hideyuki Kawashima, Hiroaki Inoue, Tetsuya Asai, Masato Motomura

研究成果: Conference contribution

抄録

Stream processing is attracting wider attention in recent years, and in order to get high efficiency, more people are now trying to leverage hardware for stream processing. In this paper, we clarify two issues by taking window join as an example application: a) how a software engineer would efficiently utilize hardware, and b) how adaptiveness will be achieved on it. We use a dynamically reconfigurable hardware with a C-based high level synthesis tool as our evaluation platform. The throughput improved by 216 times through software code optimization, and achieved 26 times higher throughput/power efficiency than an optimized software solution for a CPU. We conclude that a software engineer with certain hardware knowledge will be able to facilitate hardware, and dynamic reconfiguration capability improves the throughput/power efficiency of stream processing.

本文言語English
ホスト出版物のタイトルProceedings of the 2013 International Conference on High Performance Computing and Simulation, HPCS 2013
ページ690-691
ページ数2
DOI
出版ステータスPublished - 2013
外部発表はい
イベント2013 11th International Conference on High Performance Computing and Simulation, HPCS 2013 - Helsinki, Finland
継続期間: 2013 7 12013 7 5

出版物シリーズ

名前Proceedings of the 2013 International Conference on High Performance Computing and Simulation, HPCS 2013

Other

Other2013 11th International Conference on High Performance Computing and Simulation, HPCS 2013
国/地域Finland
CityHelsinki
Period13/7/113/7/5

ASJC Scopus subject areas

  • 応用数学
  • モデリングとシミュレーション

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