We present a detailed analysis of the impact on quantum modular exponentiation of architectural features and possible concurrent gate execution. Various arithmetic algorithms are evaluated for execution time, potential concurrency, and space trade-offs. We find that to exponentiate an n-bit number, for storage space 100n (20 times the minimum 5n), we can execute modular exponentiation 200-700 times faster than optimized versions of the basic algorithms, depending on architecture, for n=128. Addition on a neighbor-only architecture is limited to O(n) time, whereas non-neighbor architectures can reach O(logn), demonstrating that physical characteristics of a computing device have an important impact on both real-world running time and asymptotic behavior. Our results will help guide experimental implementations of quantum algorithms and devices.
|ジャーナル||Physical Review A - Atomic, Molecular, and Optical Physics|
|出版ステータス||Published - 2005 5|
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