Glitch-aware variable pipeline optimization for CGRAs

Takuya Kojima, Naoki Ando, Hayate Okuhara, Hideharu Amano

研究成果: Conference contribution

3 被引用数 (Scopus)

抄録

Although some coarse grained reconfigurable arrays (CGRAs) have a function to unify multiple processing elements (PEs) to enhance the energy efficiency, it sometimes causes propagation of glitches widely resulting in the power increases. We propose a dynamic power model considering glitches and an optimization technique using it for CGRAs. The model aims to estimate the energy consumption from the switching counts of a PE array approximately. The model and optimization were applied to a real chip of the low power CGRA called the VPCMA (Variable Pipeline Cool Mega Array). Compared with the energy estimation with a post-layout simulation, the model could estimate it with more than 10000 times faster with smaller error from the results of the real chip measurement. The optimized pipeline structure using the proposed method achived better energy consumption compared to fixed pitch pipeline structures in most cases.

本文言語English
ホスト出版物のタイトル2017 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2017
出版社Institute of Electrical and Electronics Engineers Inc.
ページ1-6
ページ数6
2018-January
ISBN(電子版)9781538637975
DOI
出版ステータスPublished - 2018 2月 2
イベント2017 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2017 - Cancun, Mexico
継続期間: 2017 12月 42017 12月 6

Other

Other2017 International Conference on Reconfigurable Computing and FPGAs, ReConFig 2017
国/地域Mexico
CityCancun
Period17/12/417/12/6

ASJC Scopus subject areas

  • ソフトウェア
  • コンピュータ ネットワークおよび通信
  • コンピュータ サイエンスの応用
  • ハードウェアとアーキテクチャ

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