Hardware support for MPI in DIMMnet-2 network interface

Noboru Tanabe, Akira Kitamura, Tomotaka Miyashiro, Yasuo Miyabe, Takeshi Araki, Zhengzhe Luo, Hironori Nakajo, Hideharu Amano

研究成果: Conference contribution

5 引用 (Scopus)

抜粋

In this paper, hardware support for MPI on the DIMMnet-2 network interface plugged into a DDR DIMM slot is presented. This hardware support realize effective eager protocol and effective derived datatype communication of MPI. As a preliminary evaluation, the evaluation results on the real prototype concerning the bandwidth of elements constituting MPI are shown. IPUSH, which is remote indirect writing, showed almost the same performance as RDMA, which is remote direct writing. IPUSH can reduce memory space required for a receiver buffer sharply The memory space reduction effect of IPUSH on a system with more nodes is higher. Compared with a method that starts the burst vector loading many times, VLS, which performs a regular-interval vector loading, sharply accelerated access to the data arranged at regular intervals. The above-mentioned results indicate that the improvement in the speed of MPI by the proposed method is promising.

元の言語English
ホスト出版物のタイトルProceedings - International Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems, IWIA 2006
ページ73-80
ページ数8
DOI
出版物ステータスPublished - 2006 12 1
外部発表Yes
イベントInternational Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems, IWIA 2006 - Kohala Coast, HI, United States
継続期間: 2006 1 232006 1 25

出版物シリーズ

名前Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems

Other

OtherInternational Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems, IWIA 2006
United States
Kohala Coast, HI
期間06/1/2306/1/25

ASJC Scopus subject areas

  • Computer Science(all)

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  • これを引用

    Tanabe, N., Kitamura, A., Miyashiro, T., Miyabe, Y., Araki, T., Luo, Z., Nakajo, H., & Amano, H. (2006). Hardware support for MPI in DIMMnet-2 network interface. : Proceedings - International Workshop on Innovative Architecture for Future Generation High Performance Processors and Systems, IWIA 2006 (pp. 73-80). [4089358] (Proceedings of the Innovative Architecture for Future Generation High-Performance Processors and Systems). https://doi.org/10.1109/IWIAS.2006.26