TY - JOUR
T1 - Hierarchical multistage interconnection network R-Clos
AU - Morimura, Tomohiro
AU - Iwai, Keisuke
AU - Amano, Hideharu
PY - 2006/11/1
Y1 - 2006/11/1
N2 - This paper proposes the multistage interconnection network (MIN) R-Clos, with a hierarchical structure in which locality of communications can be utilized. In R-Clos, a Clos network, which is a three-stage MIN, is used as the local network. By interconnecting multiple Clos networks through the intermediate stage of the hierarchical structure, a large-scale system can be constructed with a smaller hardware requirement than that for a Clos network. On the other hand, due to the use of the Clos network, with great transfer power, as the network for nearby data communications, low latency and wide bandwidth can be provided for nearby access. The latency and throughput of the proposed configuration are evaluated by a simulation using a stochastic model. Although the performance is lowered for traffic with a uniform access pattern, the transfer performance is improved for a data distribution with high locality, compared to the recursive (2s - 1)-stage Clos.
AB - This paper proposes the multistage interconnection network (MIN) R-Clos, with a hierarchical structure in which locality of communications can be utilized. In R-Clos, a Clos network, which is a three-stage MIN, is used as the local network. By interconnecting multiple Clos networks through the intermediate stage of the hierarchical structure, a large-scale system can be constructed with a smaller hardware requirement than that for a Clos network. On the other hand, due to the use of the Clos network, with great transfer power, as the network for nearby data communications, low latency and wide bandwidth can be provided for nearby access. The latency and throughput of the proposed configuration are evaluated by a simulation using a stochastic model. Although the performance is lowered for traffic with a uniform access pattern, the transfer performance is improved for a data distribution with high locality, compared to the recursive (2s - 1)-stage Clos.
KW - Multistage interconnection network
KW - Shared memory parallel computer
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U2 - 10.1002/ecjc.20280
DO - 10.1002/ecjc.20280
M3 - Article
AN - SCOPUS:33745118670
VL - 89
SP - 30
EP - 39
JO - Electronics and Communications in Japan, Part III: Fundamental Electronic Science (English translation of Denshi Tsushin Gakkai Ronbunshi)
JF - Electronics and Communications in Japan, Part III: Fundamental Electronic Science (English translation of Denshi Tsushin Gakkai Ronbunshi)
SN - 1042-0967
IS - 11
ER -