TY - GEN
T1 - HiRy
T2 - 23rd IEEE International Conference on Parallel and Distributed Systems, ICPADS 2017
AU - Kawano, Ryuta
AU - Yasudo, Ryota
AU - Matsutani, Hiroki
AU - Koibuchi, Michihiro
AU - Amano, Hideharu
N1 - Funding Information:
Acknowledgment A part of this work was supported by JSPS KAKENHI Grant Number 15J03374.
Publisher Copyright:
© 2017 IEEE.
PY - 2018/5/29
Y1 - 2018/5/29
N2 - Recently proposed irregular networks can reduce the latency for both on-chip and off-chip systems with a large number of computing nodes and thus can improve the performance of parallel application. However, these networks usually suffer from deadlocks in routing packets when using a naive minimal path routing algorithm. To solve this problem, we focus attention on a lately proposed theory that generalizes the turn model to maintain the network performance with deadlock-freedom. The theorems remain a challenge of applying themselves to arbitrary topologies including fully irregular networks. In this paper, we advance the theorems to completely general ones. To apply the idea of the turn model to arbitrary topologies, we introduce a concept of regions that define continuous directions of channels on an n-dimensional space. Moreover, we provide a feasible implementation of a deadlock-free routing method based on our advanced theorem. To reduce the latency and the number of required Virtual Channels (VCs) with this method, a heuristic approach is introduced to reduce the number of prohibited turns between channels. Experimental results show that the routing method based on our proposed theorem can improve the network throughput by up to 138 % compared to a conventional deterministic minimal routing method. Moreover, it can reduce the latency by up to 2.9 % compared to another fully adaptive routing method.
AB - Recently proposed irregular networks can reduce the latency for both on-chip and off-chip systems with a large number of computing nodes and thus can improve the performance of parallel application. However, these networks usually suffer from deadlocks in routing packets when using a naive minimal path routing algorithm. To solve this problem, we focus attention on a lately proposed theory that generalizes the turn model to maintain the network performance with deadlock-freedom. The theorems remain a challenge of applying themselves to arbitrary topologies including fully irregular networks. In this paper, we advance the theorems to completely general ones. To apply the idea of the turn model to arbitrary topologies, we introduce a concept of regions that define continuous directions of channels on an n-dimensional space. Moreover, we provide a feasible implementation of a deadlock-free routing method based on our advanced theorem. To reduce the latency and the number of required Virtual Channels (VCs) with this method, a heuristic approach is introduced to reduce the number of prohibited turns between channels. Experimental results show that the routing method based on our proposed theorem can improve the network throughput by up to 138 % compared to a conventional deterministic minimal routing method. Moreover, it can reduce the latency by up to 2.9 % compared to another fully adaptive routing method.
KW - Deadlock free Routing Algorithm
KW - High Performance Computing
KW - Interconnection Networks
KW - Irregular Networks
KW - Virtual Channels
UR - http://www.scopus.com/inward/record.url?scp=85048375136&partnerID=8YFLogxK
UR - http://www.scopus.com/inward/citedby.url?scp=85048375136&partnerID=8YFLogxK
U2 - 10.1109/ICPADS.2017.00091
DO - 10.1109/ICPADS.2017.00091
M3 - Conference contribution
AN - SCOPUS:85048375136
T3 - Proceedings of the International Conference on Parallel and Distributed Systems - ICPADS
SP - 664
EP - 673
BT - Proceedings - 2017 IEEE 23rd International Conference on Parallel and Distributed Systems, ICPADS 2017
PB - IEEE Computer Society
Y2 - 15 December 2017 through 17 December 2017
ER -