抄録
The fabrication procedure of smart pixels based on a hybrid integration of compound semiconductor photonic devices with silicon CMOS circuits is described. According to the 0.8-μm design rule, CMOS receiver/transmitter circuits are designed for use in vertical-cavity surface-emitting laser (VCSEL)-based smart pixels. And 16×16 and 2×2 banyan-switch smart-pixel chips are also designed. By using our polyimide bonding technique, we integrated GaAs pin-photodiodes hybridly on the CMOS circuits. The photodetector (PD)/CMOS hybrid receiver operated errorfree at up to 800 Mb/s. Successful optical/optical (O/O) operation (a bit rate up to 311 Mbit/s) of the 2×2 banyan-switch smart-pixel chip implemented with another VCSEL chip is also demonstrated.
本文言語 | English |
---|---|
ページ(範囲) | 209-216 |
ページ数 | 8 |
ジャーナル | IEEE Journal on Selected Topics in Quantum Electronics |
巻 | 5 |
号 | 2 |
DOI | |
出版ステータス | Published - 1999 3月 |
外部発表 | はい |
ASJC Scopus subject areas
- 原子分子物理学および光学
- 電子工学および電気工学